高速电路的信号完整性分析
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摘要
信号完整性问题已成为高速数字电路设计中迫切需要解决的关键问题。随着高速数字电路工作频率的不断提高,信号上升/下降沿时间不断变短,电路集成度不断提高,延迟、反射、串扰、过冲、振荡和同步开关噪声等信号完整性问题日益突出。
信号完整性问题的分析本质上是求解一个复杂的电磁场边值问题,为了精确分析这种复杂的电磁效应,采用基于电磁场理论的全波电磁分析方法求解复杂的电磁场边值问题是有效的。本文围绕电磁建模仿真这一主轴,从时域和频域对高速电路中一些典型结构进行信号完整性分析。
本文所做的主要工作有:
1.应用三维全波电磁仿真软件对高速互连中常见微带互连线以及常见不连续性的信号完整性性能进行分析;
2.探讨走线间串扰随信号跳变时间、走线间距离、参考层高度等参数变化的规律;此外,在相邻走线间添加多点接地的隔离带以减小串扰,并对隔离带的尺寸以及过孔间距的选取进行了讨论,仿真显示良好接地的隔离带可以有效地降低信号线间的串扰;
3.针对不完整参考面(非理想返回路径)情况下槽缝尺寸变化,数字/模拟地隔离对串扰的影响进行了分析并通过添加电容改善不完整参考面对串扰的影响;
4.由于同步开关噪声(SSN)的存在,使得PCB电路存在着电磁干扰问题,本文分析了同步开关噪声的产生原因,采用不同电磁带隙结构(EBG)抑制SSN,提出采用多孔混合的EBG结构抑制SSN的方法,并通过仿真验证了用EBG抑制SSN方法的有效性。
通过以上研究工作,论文得出的结论对高速电路的设计,解决信号完整性问题具有一定的指导意义。
Signal integrity problems have become the most urgent problem in high speed digital system design. As the systematic clock frequency is growing higher, signal’s rise/fall time is getting shorter, and integrated degree of circuit continuously increase, signal integrity problems, such as delay, reflection, crosstalk, overshoot, oscillation and simultaneous switching noise, have become more and more critical in high speed digital circuit design.
The signal integrity problems are electromagnetic (EM) problems in nature. In order to take complex electromagnetic effects into account, full-wave EM analysis based on EM theory must be resorted. Around the topic of EM modeling and simulation, high-speed interconnects have been analyzed for signal integrity issues in frequency and time domain.
The main fruit of this dissertation on both theory and applications are listed as follows: 1.The micro-strip lines and various discontinuities are analyzed and their effects on signal integrity are discussed; 2.The crosstalk simulation model of two Parallel micro-strip lines is obtained. Using the model,some important parameters about crosstalk, such as signal rise/fall time, space width and height of image plane are studied. Ground trace between adjacent traces is proposed to suppress crosstalk. The width of ground trace and the distance between vias are discussed. Simulation results verify that using trace with multipoint grounding properly can reduce crosstalk effectively; 3.The effect of the imperfect reference planes on the crosstalk between interconnections are analyzed. Stitching capacitors crossing split reference planes supply a signal return path to deal with the crosstalk; 4. Because of simultaneous switching noise (SSN), there is electromagnetic interference (EMI) in PCBs. The main causes and the common methods to solve these problems are analyzed. Simulation results demonstrate the Electromagnetic Band-Gap (EBG) structures could achieve SSN suppression for even a wider and higher frequency range.
The design guidelines for improved signal integrity are derived from the results obtained and the design of high speed circuits can be guided to solve signal integrity issues.
信号完整性问题的分析本质上是求解一个复杂的电磁场边值问题,为了精确分析这种复杂的电磁效应,采用基于电磁场理论的全波电磁分析方法求解复杂的电磁场边值问题是有效的。本文围绕电磁建模仿真这一主轴,从时域和频域对高速电路中一些典型结构进行信号完整性分析。
本文所做的主要工作有:
1.应用三维全波电磁仿真软件对高速互连中常见微带互连线以及常见不连续性的信号完整性性能进行分析;
2.探讨走线间串扰随信号跳变时间、走线间距离、参考层高度等参数变化的规律;此外,在相邻走线间添加多点接地的隔离带以减小串扰,并对隔离带的尺寸以及过孔间距的选取进行了讨论,仿真显示良好接地的隔离带可以有效地降低信号线间的串扰;
3.针对不完整参考面(非理想返回路径)情况下槽缝尺寸变化,数字/模拟地隔离对串扰的影响进行了分析并通过添加电容改善不完整参考面对串扰的影响;
4.由于同步开关噪声(SSN)的存在,使得PCB电路存在着电磁干扰问题,本文分析了同步开关噪声的产生原因,采用不同电磁带隙结构(EBG)抑制SSN,提出采用多孔混合的EBG结构抑制SSN的方法,并通过仿真验证了用EBG抑制SSN方法的有效性。
通过以上研究工作,论文得出的结论对高速电路的设计,解决信号完整性问题具有一定的指导意义。
Signal integrity problems have become the most urgent problem in high speed digital system design. As the systematic clock frequency is growing higher, signal’s rise/fall time is getting shorter, and integrated degree of circuit continuously increase, signal integrity problems, such as delay, reflection, crosstalk, overshoot, oscillation and simultaneous switching noise, have become more and more critical in high speed digital circuit design.
The signal integrity problems are electromagnetic (EM) problems in nature. In order to take complex electromagnetic effects into account, full-wave EM analysis based on EM theory must be resorted. Around the topic of EM modeling and simulation, high-speed interconnects have been analyzed for signal integrity issues in frequency and time domain.
The main fruit of this dissertation on both theory and applications are listed as follows: 1.The micro-strip lines and various discontinuities are analyzed and their effects on signal integrity are discussed; 2.The crosstalk simulation model of two Parallel micro-strip lines is obtained. Using the model,some important parameters about crosstalk, such as signal rise/fall time, space width and height of image plane are studied. Ground trace between adjacent traces is proposed to suppress crosstalk. The width of ground trace and the distance between vias are discussed. Simulation results verify that using trace with multipoint grounding properly can reduce crosstalk effectively; 3.The effect of the imperfect reference planes on the crosstalk between interconnections are analyzed. Stitching capacitors crossing split reference planes supply a signal return path to deal with the crosstalk; 4. Because of simultaneous switching noise (SSN), there is electromagnetic interference (EMI) in PCBs. The main causes and the common methods to solve these problems are analyzed. Simulation results demonstrate the Electromagnetic Band-Gap (EBG) structures could achieve SSN suppression for even a wider and higher frequency range.
The design guidelines for improved signal integrity are derived from the results obtained and the design of high speed circuits can be guided to solve signal integrity issues.
引文
[1]李征帆,毛军发.微波与高速电路理论.上海:上海交通大学出版社,2001.
[2]李征帆,曹毅.微波与高速电路中的电磁场理论及其数值方法.北京:科学出版社2002.
[3] Mark I. Montrose著,刘元安等译.电磁兼容和印刷电路板理论、设计和布线.北京:人民邮电出版社,2002.
[4] Demircan E. Effects of Interconnect Process Variations on Signal Integrity .SOC Conference, 2006 IEEE International24-27 Sept. 2006 Page(s):281~284
[5] Tzong-Lin Wu. Fundamentals of signal integrity. EMC 2008. IEEE International Symposium on 18-22 Aug. 2008 Page(s):1~19
[6] Chiariello A G,Maffucci A, Miano. Signal integrity analysis of high-speed interconnects through a full-wave transmission line model. Signal Propagation on Interconnects, 2005. Proceedings. 9th IEEE Workshop on 10-13 May 2005 Page(s):47~50
[7] Ndip, Ivan,Guttowski, etal. Acfcurate Characterization of Package and Board Components for Efficient System Level Signal Integrity Analysis. EMC 2007,IEEE International Symposium on 9-13 July 2007 Page(s): 1~6
[8] Bogatin E. Understanding signal integrity [EB/OL]. April 18, 2002.
[9] Eric Bogatin. Signal Integrity-Simplified.Prentice Hall PTR, 2003.
[10]Wang C, Drewniak J L, Nadolny J. Anticipating EMI using transfer functions and signal integrity information. IEEE International Symposium on Electromagnetic Compatibility, Aug. 2003, 2(18-22): 695– 698
[11]Mbairi F D, Siebert W P, Hesselbom H. High-Frequency Transmission Lines Crosstalk Reduction Using Spacing Rules. Components and Packaging Technologies, IEEE Transactions on Volume 31, Issue 3, Sept. 2008 Page(s):601– 610
[12]Sung M H, Ryu W H, Kim H S, etal. An efficient crosstalk parameter extraction method for high-speed interconnection lines. IEEE Transactions on Advanced Packaging, May 2000, 23(2): 148~155
[13]Kaushik B K, Sarkar S. Crosstalk Analysis for a CMOS-Gate-Driven Coupled Interconnects. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Volume 27, Issue 6, June 2008 Page(s):1150~1154
[14]Myung-Kul Kim. Crosstalk Control for Microstrip Circuits on PCBs at Microwave Frequencies. IEEE,1995,459~464
[15]Dr. Zorica Pantic-Tanner, EdwinSalgado, Franz Gisin. Cross Coupling between Power and Signal Traces on Printed Circuit Boards. IEEE, 1998, 624~628
[16]Wu Xin, C.M. Lee,M.H. Pong, etal. A novel approach base on electric field analysis to reduce crosstalk problem on PCB. IEEE, 2000, 845~849
[17]宋占海,刘元安,黎淑兰等.对垂直交叉线中串扰的分析.电波科学学报,2003(8)
[18]张华,洪伟.不完整地参考面对高速互连耦合及串扰的影响分析.东南大学学报(自然科学版),2005.5,第35卷第5期,669~672
[19]于学萍,吕英华,冯晓俊等.割裂大地对数字信号的影响.电波科学学报,2002(12):290-294
[20]Lee, K, Lee, H B., Jung, H K. A Serpentine Guard Trace to Reduce the Far-End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel Microstrip Lines. Advanced Packaging, IEEE Transactions on Volume 31, Issue 4, Nov. 2008 Page(s):809~817
[21]彭元杰,何怡刚,郭杰荣.传输线中信号反射的研究.现代电子技术.2007/21期
[22]Rainal A J, Computing inductive noise of chip package. AT&T Bell Laboratories Technical Journal, vol.63, no.1, pp. 177~195, 1984.
[23]杨晓平,李征帆,以PEEC方法分析MCM中导体板上同步开关噪声.上海交通大学学报,2000,34(6):752~755
[24]Geest J D, Sercu S, Nadolny J. Electrical modeling of high speed interconnection links. 51st Electronic Components and Technology Conference, June 2001, 29(May-1): 1245~1249
[25]孙靖国,牛文生,刘东.高速数字电路中的信号完整性问题.航空计算技术,2001.12.
[26]周润景,袁伟亭,刘晓滨.Cadence PCB设计与制板.北京:电子工业出版社,2005.4.
[27]Johnson H W, Martin G. High-speed Digital Design. New Jersey, Prentice Hall, Englewood Cliffs, 2001
[28]Chen R Y. Engineering Electromagnetic Compatibility. TEES Press and John Wiley & Sons, Inc., 2001, Chapterl4.
[29]Ruehli A E, Cangellaris A C. Progress in the methodologies for the electrical modeling of interconnects and electronic packages. Proceedings of the IEEE, May 2001, 89 (5): 740~771.
[30]王秉中.计算电磁学.北京:科学出版社,2002, 8~14.
[31]Zutter D.D., Rogier H, Sercu J. Dedicated method of moments technique for signal integrity predictions. IEEE Antennas and Propagation Society International Symposium, June 2002, 2(16-21): 818~821.
[32]Howard W Johnson, Martin Graham. High-Speed Digital Design. Prentice Hall PTR, 1993.
[33]Stephen H. Hall, Garrett W. Hall, James A. McCall. High-Speed Digital System Design.Wiley-Interscience Publication, 2000.
[34]Mu-Shui Zhang, Yu-Shan Li, Chen Jia. A Power Plane With Wideband SSN Suppression Using a Multi-Via Electromagnetic Bandgap Structure. Microwave and Wireless Components Letters, IEEE Volume 17, Issue 4, April 2007 Page(s):307~309
[35]《中国集成电路大全》编委会.微波集成电路.北京:国防工业出版社,1995.
[36]Devendra K.Misra著,张肇仪,祝西里等译.射频与微波通信电路.北京:电子工业出版社,2005,229~249
[37]Douglas Brooks. Signal Integrity Issues and Printed Circuit Board Design. Prentice Hall PTR, 2003
[38]Jingook Kim, Heeseok Lee, Joungho Kim. Effects on signal integrity and radiated emission by split reference plane on high-speed multilayer printed circuit boards. Advanced Packaging, IEEE Transactions on Volume 28, Issue 4, Nov. 2005 Page(s):724~73
[39]Zhang M S, Li Y.-S, Jia C. Signal Integrity Analysis of the Traces in Electromagnetic-Bandgap Structure in High-Speed Printed Circuit Boards and Packages. Microwave Theory and Techniques, IEEE Transactions on Volume 55, Issue 5, May 2007 Page(s):1054~1062
[40]Ktata M F, Arz U, Grabinski H. Influence of the ground line position on the signal integrity of product-related interconnects in the frequency and time domain. Advanced Packaging, IEEE Transactions on Volume 28, Issue 2, May 2005 Page(s):152~159
[41]Junwoo Lee, Rotaru M D, Iyer M K. Analysis and suppression of SSN noise coupling between power/ground plane cavities through cutouts in multilayer packages and PCBs. Advanced Packaging, IEEE Transactions on Volume 28, Issue 2, May 2005 Page(s):298~309
[42]Jongbae Park, Hyungsoo Kim, Jun So Pak. Characterization of SSN coupling to signal via in multi-layer PCBs and packages.EMC-Zurich 2006. 17th International Zurich Symposium on Feb. 27 2006-March 3 2006 Page(s):328~331
[43]Xiao-Xiao Wang, Dong-Lin Su. The Influence of Power/Ground Resonance to Via's SSN Noise Coupling in Multilayer Package and Three Mitigating Ways. Electronic Materials and Packaging, 2006. EMAP 2006. International Conference on 11-14 Dec. 2006 Page(s):1~5
[44]Roy Leventhal. Signal Integrity Board Design & Simulation Techniques. 2006.4
[45]张华.高速互连系统的信号完整性研究.南京:东南大学博士论文,2005
[46]经纬.不同差分传输线线形对信号完整性的影响.印制电路信息, 2007,(09)
[47]方国华,刘光斌,余志勇.基于IBIS模型的信号完整性仿真分析.计算机科学与技术,2004,No.6:68~71
[48]郑常斌,张丹,黎淑兰,刘元安. PCB上两平行微带线的串扰分析.安全与电磁兼容, 2007,(03)
[49]李荔.信号完整性和电源完整性的仿真分析与设计.电子设计应用,2006(1):72~75
[50]顾继慧.微波技术.北京:科学出版社,2004
[51]张海风.HyperLynx仿真与PCB设计.北京:机械工业出版社,2005,6~14
[2]李征帆,曹毅.微波与高速电路中的电磁场理论及其数值方法.北京:科学出版社2002.
[3] Mark I. Montrose著,刘元安等译.电磁兼容和印刷电路板理论、设计和布线.北京:人民邮电出版社,2002.
[4] Demircan E. Effects of Interconnect Process Variations on Signal Integrity .SOC Conference, 2006 IEEE International24-27 Sept. 2006 Page(s):281~284
[5] Tzong-Lin Wu. Fundamentals of signal integrity. EMC 2008. IEEE International Symposium on 18-22 Aug. 2008 Page(s):1~19
[6] Chiariello A G,Maffucci A, Miano. Signal integrity analysis of high-speed interconnects through a full-wave transmission line model. Signal Propagation on Interconnects, 2005. Proceedings. 9th IEEE Workshop on 10-13 May 2005 Page(s):47~50
[7] Ndip, Ivan,Guttowski, etal. Acfcurate Characterization of Package and Board Components for Efficient System Level Signal Integrity Analysis. EMC 2007,IEEE International Symposium on 9-13 July 2007 Page(s): 1~6
[8] Bogatin E. Understanding signal integrity [EB/OL]. April 18, 2002.
[9] Eric Bogatin. Signal Integrity-Simplified.Prentice Hall PTR, 2003.
[10]Wang C, Drewniak J L, Nadolny J. Anticipating EMI using transfer functions and signal integrity information. IEEE International Symposium on Electromagnetic Compatibility, Aug. 2003, 2(18-22): 695– 698
[11]Mbairi F D, Siebert W P, Hesselbom H. High-Frequency Transmission Lines Crosstalk Reduction Using Spacing Rules. Components and Packaging Technologies, IEEE Transactions on Volume 31, Issue 3, Sept. 2008 Page(s):601– 610
[12]Sung M H, Ryu W H, Kim H S, etal. An efficient crosstalk parameter extraction method for high-speed interconnection lines. IEEE Transactions on Advanced Packaging, May 2000, 23(2): 148~155
[13]Kaushik B K, Sarkar S. Crosstalk Analysis for a CMOS-Gate-Driven Coupled Interconnects. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Volume 27, Issue 6, June 2008 Page(s):1150~1154
[14]Myung-Kul Kim. Crosstalk Control for Microstrip Circuits on PCBs at Microwave Frequencies. IEEE,1995,459~464
[15]Dr. Zorica Pantic-Tanner, EdwinSalgado, Franz Gisin. Cross Coupling between Power and Signal Traces on Printed Circuit Boards. IEEE, 1998, 624~628
[16]Wu Xin, C.M. Lee,M.H. Pong, etal. A novel approach base on electric field analysis to reduce crosstalk problem on PCB. IEEE, 2000, 845~849
[17]宋占海,刘元安,黎淑兰等.对垂直交叉线中串扰的分析.电波科学学报,2003(8)
[18]张华,洪伟.不完整地参考面对高速互连耦合及串扰的影响分析.东南大学学报(自然科学版),2005.5,第35卷第5期,669~672
[19]于学萍,吕英华,冯晓俊等.割裂大地对数字信号的影响.电波科学学报,2002(12):290-294
[20]Lee, K, Lee, H B., Jung, H K. A Serpentine Guard Trace to Reduce the Far-End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel Microstrip Lines. Advanced Packaging, IEEE Transactions on Volume 31, Issue 4, Nov. 2008 Page(s):809~817
[21]彭元杰,何怡刚,郭杰荣.传输线中信号反射的研究.现代电子技术.2007/21期
[22]Rainal A J, Computing inductive noise of chip package. AT&T Bell Laboratories Technical Journal, vol.63, no.1, pp. 177~195, 1984.
[23]杨晓平,李征帆,以PEEC方法分析MCM中导体板上同步开关噪声.上海交通大学学报,2000,34(6):752~755
[24]Geest J D, Sercu S, Nadolny J. Electrical modeling of high speed interconnection links. 51st Electronic Components and Technology Conference, June 2001, 29(May-1): 1245~1249
[25]孙靖国,牛文生,刘东.高速数字电路中的信号完整性问题.航空计算技术,2001.12.
[26]周润景,袁伟亭,刘晓滨.Cadence PCB设计与制板.北京:电子工业出版社,2005.4.
[27]Johnson H W, Martin G. High-speed Digital Design. New Jersey, Prentice Hall, Englewood Cliffs, 2001
[28]Chen R Y. Engineering Electromagnetic Compatibility. TEES Press and John Wiley & Sons, Inc., 2001, Chapterl4.
[29]Ruehli A E, Cangellaris A C. Progress in the methodologies for the electrical modeling of interconnects and electronic packages. Proceedings of the IEEE, May 2001, 89 (5): 740~771.
[30]王秉中.计算电磁学.北京:科学出版社,2002, 8~14.
[31]Zutter D.D., Rogier H, Sercu J. Dedicated method of moments technique for signal integrity predictions. IEEE Antennas and Propagation Society International Symposium, June 2002, 2(16-21): 818~821.
[32]Howard W Johnson, Martin Graham. High-Speed Digital Design. Prentice Hall PTR, 1993.
[33]Stephen H. Hall, Garrett W. Hall, James A. McCall. High-Speed Digital System Design.Wiley-Interscience Publication, 2000.
[34]Mu-Shui Zhang, Yu-Shan Li, Chen Jia. A Power Plane With Wideband SSN Suppression Using a Multi-Via Electromagnetic Bandgap Structure. Microwave and Wireless Components Letters, IEEE Volume 17, Issue 4, April 2007 Page(s):307~309
[35]《中国集成电路大全》编委会.微波集成电路.北京:国防工业出版社,1995.
[36]Devendra K.Misra著,张肇仪,祝西里等译.射频与微波通信电路.北京:电子工业出版社,2005,229~249
[37]Douglas Brooks. Signal Integrity Issues and Printed Circuit Board Design. Prentice Hall PTR, 2003
[38]Jingook Kim, Heeseok Lee, Joungho Kim. Effects on signal integrity and radiated emission by split reference plane on high-speed multilayer printed circuit boards. Advanced Packaging, IEEE Transactions on Volume 28, Issue 4, Nov. 2005 Page(s):724~73
[39]Zhang M S, Li Y.-S, Jia C. Signal Integrity Analysis of the Traces in Electromagnetic-Bandgap Structure in High-Speed Printed Circuit Boards and Packages. Microwave Theory and Techniques, IEEE Transactions on Volume 55, Issue 5, May 2007 Page(s):1054~1062
[40]Ktata M F, Arz U, Grabinski H. Influence of the ground line position on the signal integrity of product-related interconnects in the frequency and time domain. Advanced Packaging, IEEE Transactions on Volume 28, Issue 2, May 2005 Page(s):152~159
[41]Junwoo Lee, Rotaru M D, Iyer M K. Analysis and suppression of SSN noise coupling between power/ground plane cavities through cutouts in multilayer packages and PCBs. Advanced Packaging, IEEE Transactions on Volume 28, Issue 2, May 2005 Page(s):298~309
[42]Jongbae Park, Hyungsoo Kim, Jun So Pak. Characterization of SSN coupling to signal via in multi-layer PCBs and packages.EMC-Zurich 2006. 17th International Zurich Symposium on Feb. 27 2006-March 3 2006 Page(s):328~331
[43]Xiao-Xiao Wang, Dong-Lin Su. The Influence of Power/Ground Resonance to Via's SSN Noise Coupling in Multilayer Package and Three Mitigating Ways. Electronic Materials and Packaging, 2006. EMAP 2006. International Conference on 11-14 Dec. 2006 Page(s):1~5
[44]Roy Leventhal. Signal Integrity Board Design & Simulation Techniques. 2006.4
[45]张华.高速互连系统的信号完整性研究.南京:东南大学博士论文,2005
[46]经纬.不同差分传输线线形对信号完整性的影响.印制电路信息, 2007,(09)
[47]方国华,刘光斌,余志勇.基于IBIS模型的信号完整性仿真分析.计算机科学与技术,2004,No.6:68~71
[48]郑常斌,张丹,黎淑兰,刘元安. PCB上两平行微带线的串扰分析.安全与电磁兼容, 2007,(03)
[49]李荔.信号完整性和电源完整性的仿真分析与设计.电子设计应用,2006(1):72~75
[50]顾继慧.微波技术.北京:科学出版社,2004
[51]张海风.HyperLynx仿真与PCB设计.北京:机械工业出版社,2005,6~14