深亚微米VLSI电源/地线网络信号完整性主要问题的算法研究
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摘要
随着深亚微米/超深亚微米技术的发展,对高性能、低功耗IC设计的需求与日俱增。高性能、低功耗IC设计的特点使得晶体管特征尺寸越来越小、芯片功能越来越复杂、电源供电电压越来越低。这些新的特点造成电源/地线网络规模巨大且结构复杂,因此电源/地线信号完整性成为当前深亚微米集成电路物理设计中一个引人注目的关键问题。
     电源/地线网中的信号完整性问题主要由以下噪声源引起:IR-drop、Ldi/dt-drop、LC振荡、地反弹和电迁移效应,这些效应导致电路开关速度降低,甚至电路功能失效,芯片寿命减短。因此,电源信号完整性的研究对芯片能实现正确的功能有着及其重要的作用:(1)判断芯片中产生逻辑错误或逻辑功能失效的具体位置预测芯片的性能;(2)为版图设计中布局布线的优化奠定基础,提高整个芯片的性能。
     目前对电源/地线网络的分析验证主要存在以下困难:(1)电源/地线网络规模巨大,有数百万到上亿个顶点规模,目前现有的专门的分析工具根本不可能完成全芯片的分析;(2)网络存在多个非线性开关器件,导致电源/地线网络为非线性网络,增加了分析的难度;(3)网络中电压和电流的分布依赖于处理器的指令,为动态值。
     所以,寻找新的分析方法成为目前电源/地线网络研究的热点。目前,电源/地线网络分析主要是在求解速度、计算精度和CPU占用内存三方面进行折。本课题围绕以下几个方面展开具体工作:
     1.在VLSI电源/地线网络物理拓扑结构的基础上,研究了引起电源/地线网络中的信号完整性问题的噪声源和电源/地线网络分析和设计的关键问题,研究了电源/地线网络等效模型的建构。
     2.总结了国内外主要的电源/地线网络的分析方法并且比较了各种方法的优缺点,可求解节点数和计算速度等。分析了目前分析电源/地线网络的信号完整性主要的几种方法存在的缺陷。研究了电源/地线网络的压缩和分割的方法,提出了有效的网络压缩的方法,加快分析时的计算速度。
     3.研究了电源/地线网络方程组超大规模稀疏矩阵的存储方法,提出采用行索引的一维稀疏存储结构对电源/地线网络的大规模稀疏系数矩阵进行压缩处理,仅存储了系数矩阵中的非零元素,无需存储零元素,减小了内存的需要,提高了计算速度的提高。
     4.在压缩存储的基础上,针对网络本身的特点,提出了改进式Krylov-Subspace迭代算法,将BCG与BiCGStab算法引入电源/地线网络的分析中,并取得了很好的计算结果。实验数据表明本文算法适用于分析规模日益增大的微处理器中的电源/地线网络的静态和瞬态的分析。
     5.深入研究了随机游走算法在电源/地线网络中的应用,对电源/地线网络进行了静态分析进行了大量的模拟。提出了利用网络的拓扑的特点,将电源/地线网络简化和压缩,加快了超大规模电路的静态分析速度。在瞬态分析中,针对随机游走算法中的缺点,提出部分随机游走方法;根据在电源/地线网络瞬态分析中随机游走算法具有区域特性,提出分块计算;提出新的游走结束判定方法和提出链表加速方法。实验结果证明改进随机游走算法完全可以应用于VLSI或ULSI的电源/地线网络的静态的局部分析和瞬态全网分析中。
With the great progress of modern deep submicron VLSI, there is an increased demand for high performance and low power supply IC designs. High performance is achieved by shrinking feature size, increased functionality, lower supply voltage and improved technology. This results in more complex power distribution networks. A robust power grids design is essential to ensure that the circuits on a chip operate reliably at the guaranteed level of performance. So the signal-integrity in power grids has now become the key problem and an attractive research topic in the IC Physical design.
     Signal-integrity problem in power grids consists of IR-drop and Ldi/dt-drop on the multilevel metal connections in which may include tens of millions nodes, and this leads to variation of supply voltage, reduced noise margins, higher logic gate delays and overall slower circuits. Efficient analysis of power grids is necessary for predicting the performance and improving the performance if necessary. But the difficulty in power grids analysis stems mainly from three sources:
     1. Network is very large, typically 1 million to 100 million nodes;
     2. Network is nonlinear as it contains switching devices;
     3. Voltage and current distribution in the network is dependent on the instruction executed on the processor.
     But now current commercial simulation tools are not able to deal with this kind huge power grid system. So there is an intense requirement for new efficient techniques, in terms of both execution time and memory, for the analysis of power grids to make tradeoff between simulation accuracy and cost of CPU. Several problems are studied on the signal-integrity in power grids. The main contributions are as follows:
     1. Based on the physical structure of VLSI power grid, signal-integrity problems in power grids and the key issues in design and analysis of power grids are studied. Also the model of VLSI power grids is made in-depth analysis.
     2. Based on the comparisons of current different power grids analysis methods in the world, their advantages and disadvantages are summaried according to their capability and computational speed. The partition and compact techniques to reduce the scale of original power grids are researched in detail. And effective methods for compressing network are proposed to accelarate numerical simulation.
     3. An efficient storage strategy used to save the memory is proposed in this dissertation. One dimensional row-indexed compact sparase matrix storage structured approach is proposed to compress the coefficient matrix. Only non-zero elements are stored and the zero elements are ignored in each line of the coefficient matrix. In this way, the matrix is substituted by a real array to store the non-zero elements and an integer array to store the corresponding column coordinate. So the matrix can be compressed in two sets of array. The storage cells are dramatically reduced and the computation has been sped up. This makes tradeoff between simulation accuracy and cost of CPU.
     4. Based on the compressed technique and the analysis of power grids, an improved krylov-subspace iterative algorithm is proposed to perform static and transient simulations for large-scale power grids, in which BCG and BiCGStab algorithms are adopted. Extensive experimental results on large-scale power grids show that proposed method is over two orders faster than Hspice simulation speed, and which has more powerful capability to deal with the increasing size of power grids in modern microprocessors than general-purpose circuit simulators with significant memory and run-time saving.
     5. With in-depth research of random walk algorithm, an improved algorithm is proposed to perform efficient transient simulations for large-scale VLSI power grid circuits and an excellent result is obtained. Based on the local characteristic of random walk in transient analysis, only partial walk, region separated and booking method are used in this new method, which has avoided the full network computing and accelerated the compute speed. Compared with traditional methods, the analysis speed of the presented method is much faster. Extensive experimental results on large-scale power grid circuits show that the improved method not only achieve speedups over than the existing approaches, but also are more robust in solving various types of industrial circuits and has an acceptable error margin.
引文
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