CMOS振荡器噪声理论及优化技术研究
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摘要
在无线通信系统中,随着无线用户更加有效使用已经稀少的频率资源的要求的增多,频谱已是一种重要的商品。通信收发器主要通过本地振荡器实现频率转换,因此接收器和发送器中的振荡器频谱纯度是限制最多信道和用户的因素之一。正因为如此,深入理解限制振荡器性能的基本问题以及开发解决这些问题的设计准则是必要的。
本文在完成对CMOS振荡器领域国内外研究现状调研的基础上,进行CMOS振荡器噪声理论和优化技术研究。探讨适合于高频集成电路设计的深亚微米MOSFET高频噪声模型;进行CMOS振荡器相位噪声建模的研究;探索CMOS振荡器低相噪技术的优化方法;并且对CMOS振荡器的电路结构进行深入的研究,包括以下几个方面的内容:
研究深亚微米MOSFET高频噪声模型。首先考虑MOSFET的短沟道效应(迁移率退化、速度饱和、热载流子效应、体电荷效应、沟道长度调制效应等)对器件噪声的影响,将短沟道效应模型,特别是热载流子效应的模型引入MOSFET热噪声模型的推导过程,以提高深亚微米MOSFET热噪声模型的精确度;然后从高频集成电路设计者方便使用的角度出发,提出了一种只包括器件的设计参数和工艺参数,不存在微积分表达方式和拟合参数的MOSFET热噪声代数解析模型,促进了深亚微米MOSFET热噪声模型的易用性;最后通过沟道热噪声、栅极诱导噪声和栅极电阻噪声三种高频噪声源建立了完整的MOSFET器件高频噪声代数解析模型,对深亚微米MOSFET的噪声性能进行较为全面地评估,并验证了沟道热噪声是MOSFET的主要高频噪声源。
研究CMOS振荡器相位噪声模型。线性时不变分析、线性时变分析和非线性分析三种方法是研究振荡器相位噪声理论的主要途径。由于线性时变分析方法在预测CMOS振荡器相位噪声的准确度和易用性这两个方面作了很好地折衷,因此将首先被用作建立CMOS振荡器相位噪声模型的方法;然后将提出的深亚微米MOSFET热噪声模型引入CMOS振荡器相位噪声模型,进一步提高CMOS振荡器相位噪声模型的精确度;最后通过对脉冲敏感函数进行合理地简化,进而为CMOS振荡器设计者提供了方便使用的振荡器相位噪声模型。
研究CMOS振荡器噪声优化技术。本质上来说,CMOS振荡器内在的相位噪声主要来源于电阻和MOSFET的噪声,并经过调制作用转化成为CMOS振荡器的相位噪声。因此,从电阻和深亚微米MOSFET器件噪声分析以及CMOS振荡器相位噪声分析两方面入手,全面地分析CMOS振荡器的相位噪声机理,并且提出了CMOS振荡器噪声优化方法,为促进CMOS振荡器噪声性能奠定基础。
研究CMOS振荡器的电路结构。基于以上对深亚微米MOSFET器件噪声理论、CMOS振荡器相位噪声理论和CMOS振荡器噪声优化技术的研究,通过改变振荡器的电路结构和MOSFET器件类型的方法,提出低相噪环形振荡器的电路结构。
本文不仅研究了器件高频噪声对CMOS振荡器相位噪声的影响,而且也分析了低频噪声(例如闪烁噪声)模型,给出了一种经验表达模型,并定量地分析了低频噪声对CMOS振荡器相位噪声的影响。
In wireless communications, the frequency spectrum is a valuable commodity as the ever increasing number of wireless users demands more efficient usage of the already scarce frequency resources. Communication transceivers rely heavily on frequency conversion using local oscillators (LOs) and therefore the spectral purity of the oscillators in both the receiver and the transmitter is one of the factors limiting the maximum number of available channels and users. For that reason, a deeper understanding of the fundamental issues limiting the performance of oscillators, and development of desing guidelines to improve them, are necessary.
Based on the domestic and foreign study state in CMOS oscillator, noise theory and optimization technology in CMOS oscillator is studied. High-frequency noise modeling in submicron MOSFET, phase noise modeling in CMOS oscillator, noise optimization technology, and CMOS oscillator circuit are studied to be suitable for high-frequency IC design. These studies are included as following aspects in detail.
Study on high-frequency noise modeling in submicron MOSFET. Firstly, the effect on device noise by short-channle effects of deep submicron MOSFETs, such as mobility degradation, hot carrier, bulk change and channel length modulation effect are considered, and the models of short-channel effect, especially the model of hot carrier effect, are introduced into the modeling process of MOSFET channel thermal noise to improve the precision of the modeling. Secondly, the algebraic analytical model which include device design and model parameters and not include calculous is proposed to improve simplify for RF IC designer. Thirdly, the high-frquency noise modeling which include three kinds of noise source: channel thermal noise, induced gate noise and gate resistance noise is proposed, and can analyze roundly noise in submicron MOSFET. By measurement, channel thermal noise is main noise source in submicron MOSFET.
Study on phase noise modeling in CMOS oscillator. Linear time invariant (LTI), linear time variant (LTV) and nolinear analysis are three kinds of methods for study on phase noise theory in oscillator. For LTV analysis can predict well phase noise of oscillator in precision and simplify, the method is selected as modeling phase noise in CMOS oscillator. Then, channel thermal noise model in submicron MOSFET is introduced into modeling process of phase noise to improve well precision. By simplifying in reason impulse sensitive function (ISF), phase noise modelings in CMOS oscillator are suitable for CMOS oscillator designer.
Study on noise optimization technology in CMOS oscillator. Basically, in CMOS oscillator, the noise in resistance and MOSFET is main reason, and modulated to translate phase noise. So, device noise modeling in resistance and submicron MOSFET and phase noise modeling in CMOS oscillator are selected as analyzing underlying physical mechanisms of oscillator, and the optimization methods for oscillators are proposed to improve noise performance in CMOS oscillator.
Study on CMOS oscillator circuit. Based on noise theory in submicron, phase noise theory in CMOS oscillator, and noise optimization technology in CMOS oscillator, a low phase noise ring oscillator is proposed by changing oscillator ciruit and device type of MOSFET.
The thesis studies not only the high frequency device noise, but also the low frequency device noise (1/f noise) effect on CMOS oscillators by experiential modeling and analyzing quantificationally of flicker noise.
本文在完成对CMOS振荡器领域国内外研究现状调研的基础上,进行CMOS振荡器噪声理论和优化技术研究。探讨适合于高频集成电路设计的深亚微米MOSFET高频噪声模型;进行CMOS振荡器相位噪声建模的研究;探索CMOS振荡器低相噪技术的优化方法;并且对CMOS振荡器的电路结构进行深入的研究,包括以下几个方面的内容:
研究深亚微米MOSFET高频噪声模型。首先考虑MOSFET的短沟道效应(迁移率退化、速度饱和、热载流子效应、体电荷效应、沟道长度调制效应等)对器件噪声的影响,将短沟道效应模型,特别是热载流子效应的模型引入MOSFET热噪声模型的推导过程,以提高深亚微米MOSFET热噪声模型的精确度;然后从高频集成电路设计者方便使用的角度出发,提出了一种只包括器件的设计参数和工艺参数,不存在微积分表达方式和拟合参数的MOSFET热噪声代数解析模型,促进了深亚微米MOSFET热噪声模型的易用性;最后通过沟道热噪声、栅极诱导噪声和栅极电阻噪声三种高频噪声源建立了完整的MOSFET器件高频噪声代数解析模型,对深亚微米MOSFET的噪声性能进行较为全面地评估,并验证了沟道热噪声是MOSFET的主要高频噪声源。
研究CMOS振荡器相位噪声模型。线性时不变分析、线性时变分析和非线性分析三种方法是研究振荡器相位噪声理论的主要途径。由于线性时变分析方法在预测CMOS振荡器相位噪声的准确度和易用性这两个方面作了很好地折衷,因此将首先被用作建立CMOS振荡器相位噪声模型的方法;然后将提出的深亚微米MOSFET热噪声模型引入CMOS振荡器相位噪声模型,进一步提高CMOS振荡器相位噪声模型的精确度;最后通过对脉冲敏感函数进行合理地简化,进而为CMOS振荡器设计者提供了方便使用的振荡器相位噪声模型。
研究CMOS振荡器噪声优化技术。本质上来说,CMOS振荡器内在的相位噪声主要来源于电阻和MOSFET的噪声,并经过调制作用转化成为CMOS振荡器的相位噪声。因此,从电阻和深亚微米MOSFET器件噪声分析以及CMOS振荡器相位噪声分析两方面入手,全面地分析CMOS振荡器的相位噪声机理,并且提出了CMOS振荡器噪声优化方法,为促进CMOS振荡器噪声性能奠定基础。
研究CMOS振荡器的电路结构。基于以上对深亚微米MOSFET器件噪声理论、CMOS振荡器相位噪声理论和CMOS振荡器噪声优化技术的研究,通过改变振荡器的电路结构和MOSFET器件类型的方法,提出低相噪环形振荡器的电路结构。
本文不仅研究了器件高频噪声对CMOS振荡器相位噪声的影响,而且也分析了低频噪声(例如闪烁噪声)模型,给出了一种经验表达模型,并定量地分析了低频噪声对CMOS振荡器相位噪声的影响。
In wireless communications, the frequency spectrum is a valuable commodity as the ever increasing number of wireless users demands more efficient usage of the already scarce frequency resources. Communication transceivers rely heavily on frequency conversion using local oscillators (LOs) and therefore the spectral purity of the oscillators in both the receiver and the transmitter is one of the factors limiting the maximum number of available channels and users. For that reason, a deeper understanding of the fundamental issues limiting the performance of oscillators, and development of desing guidelines to improve them, are necessary.
Based on the domestic and foreign study state in CMOS oscillator, noise theory and optimization technology in CMOS oscillator is studied. High-frequency noise modeling in submicron MOSFET, phase noise modeling in CMOS oscillator, noise optimization technology, and CMOS oscillator circuit are studied to be suitable for high-frequency IC design. These studies are included as following aspects in detail.
Study on high-frequency noise modeling in submicron MOSFET. Firstly, the effect on device noise by short-channle effects of deep submicron MOSFETs, such as mobility degradation, hot carrier, bulk change and channel length modulation effect are considered, and the models of short-channel effect, especially the model of hot carrier effect, are introduced into the modeling process of MOSFET channel thermal noise to improve the precision of the modeling. Secondly, the algebraic analytical model which include device design and model parameters and not include calculous is proposed to improve simplify for RF IC designer. Thirdly, the high-frquency noise modeling which include three kinds of noise source: channel thermal noise, induced gate noise and gate resistance noise is proposed, and can analyze roundly noise in submicron MOSFET. By measurement, channel thermal noise is main noise source in submicron MOSFET.
Study on phase noise modeling in CMOS oscillator. Linear time invariant (LTI), linear time variant (LTV) and nolinear analysis are three kinds of methods for study on phase noise theory in oscillator. For LTV analysis can predict well phase noise of oscillator in precision and simplify, the method is selected as modeling phase noise in CMOS oscillator. Then, channel thermal noise model in submicron MOSFET is introduced into modeling process of phase noise to improve well precision. By simplifying in reason impulse sensitive function (ISF), phase noise modelings in CMOS oscillator are suitable for CMOS oscillator designer.
Study on noise optimization technology in CMOS oscillator. Basically, in CMOS oscillator, the noise in resistance and MOSFET is main reason, and modulated to translate phase noise. So, device noise modeling in resistance and submicron MOSFET and phase noise modeling in CMOS oscillator are selected as analyzing underlying physical mechanisms of oscillator, and the optimization methods for oscillators are proposed to improve noise performance in CMOS oscillator.
Study on CMOS oscillator circuit. Based on noise theory in submicron, phase noise theory in CMOS oscillator, and noise optimization technology in CMOS oscillator, a low phase noise ring oscillator is proposed by changing oscillator ciruit and device type of MOSFET.
The thesis studies not only the high frequency device noise, but also the low frequency device noise (1/f noise) effect on CMOS oscillators by experiential modeling and analyzing quantificationally of flicker noise.
引文
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