基于ADSP-TS203的成像声纳信号处理平台设计与实现
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摘要
在对诸如海底沉船、海底输油管、堤坝等水下物体表面的探测中,光学成像对水文状况有很高的要求,其作用距离受到很大的限制。成像声纳则相对限制较少,可以在黑暗或者混浊水中得到清晰的图像,因而在水下成像技术的发展中占有重要地位。随着技术的发展,成像声纳向着高精度、实时成像的方向发展,而这就要求成像声纳的信号处理平台具有运算速度快、数据吞吐量高的特点。
本论文正是以声成像为应用背景,研制一款适用于成像声纳的信号处理平台。本平台选择采用一片高性能DSP器件ADSP-TS203为计算核心和一片FPGA为控制核心的架构,以HOTLink高速串行传输和CPCI高速并行传输为数据进出本平台的通道,保证了信号处理平台的运算能力和传输能力满足成像声纳的要求。
在高速硬件设计中,对常见的三大类噪声进行了仿真与分析并提出了相应的抑制方法,优化了信号处理平台的硬件设计,有效解决了平台的信号完整性问题,提高了平台的稳定性。
设计完成了包括DSP总线通信接口、DSP链路口通信接口、HOTLink通信接口和PCI9656通信接口在内的接口控制逻辑,并对接口性能做了测试,各个接口基本可以满足性能要求。
本信号处理处理平台的实现既可以满足该项目的工程要求,又可以作为成像声纳数据处理算法的验证平台。
The coverage of optical imaging devices is limited by bad hydrological condition when using the devices to detect the surface of underwater object such as wreck, pipe-laying, dykes and dams. Correspondingly, the imaging sonar has less restriction and gets clear images even in the dark or turbid water. So the acoustic imaging technique plays an important role in the development of the underwater imaging devices. With the development of the technology, imaging sonar is more precisely and works in real time, thus its signal processing platform must calculate quickly and have broad data transfer bandwidth.
This dissertation puts forward a new platform which is suitable for signal processing in imaging sonar. The platform has one ultrahigh performance processor ADSP-TS203 as the calculate kernel and one FPGA as the logic centre. Data import from the HOTLink—a kind of high-speed serial transmission, and export to the CPCI bus—a kind of high-speed parallel bus. This architecture lets platform have high performance both in calculate and data transfer.
The most three familiar noise of the high-speed circuit have been analyzed and emulated to optimize the platform when designing PCB. These works solve the SI (Signal Integrity) problem and make the platform be more robust.
Designed and compiled the routine of the interface logic control in FPGA. The FPGA has four interfaces which connected to DSP bus, DSP link port, HOTLink, and PCI 9656. Each interface was verified and performs well.
This signal processing platform not only satisfies the project needs, but also can be used to validate imaging sonar data processing algorithms.
本论文正是以声成像为应用背景,研制一款适用于成像声纳的信号处理平台。本平台选择采用一片高性能DSP器件ADSP-TS203为计算核心和一片FPGA为控制核心的架构,以HOTLink高速串行传输和CPCI高速并行传输为数据进出本平台的通道,保证了信号处理平台的运算能力和传输能力满足成像声纳的要求。
在高速硬件设计中,对常见的三大类噪声进行了仿真与分析并提出了相应的抑制方法,优化了信号处理平台的硬件设计,有效解决了平台的信号完整性问题,提高了平台的稳定性。
设计完成了包括DSP总线通信接口、DSP链路口通信接口、HOTLink通信接口和PCI9656通信接口在内的接口控制逻辑,并对接口性能做了测试,各个接口基本可以满足性能要求。
本信号处理处理平台的实现既可以满足该项目的工程要求,又可以作为成像声纳数据处理算法的验证平台。
The coverage of optical imaging devices is limited by bad hydrological condition when using the devices to detect the surface of underwater object such as wreck, pipe-laying, dykes and dams. Correspondingly, the imaging sonar has less restriction and gets clear images even in the dark or turbid water. So the acoustic imaging technique plays an important role in the development of the underwater imaging devices. With the development of the technology, imaging sonar is more precisely and works in real time, thus its signal processing platform must calculate quickly and have broad data transfer bandwidth.
This dissertation puts forward a new platform which is suitable for signal processing in imaging sonar. The platform has one ultrahigh performance processor ADSP-TS203 as the calculate kernel and one FPGA as the logic centre. Data import from the HOTLink—a kind of high-speed serial transmission, and export to the CPCI bus—a kind of high-speed parallel bus. This architecture lets platform have high performance both in calculate and data transfer.
The most three familiar noise of the high-speed circuit have been analyzed and emulated to optimize the platform when designing PCB. These works solve the SI (Signal Integrity) problem and make the platform be more robust.
Designed and compiled the routine of the interface logic control in FPGA. The FPGA has four interfaces which connected to DSP bus, DSP link port, HOTLink, and PCI 9656. Each interface was verified and performs well.
This signal processing platform not only satisfies the project needs, but also can be used to validate imaging sonar data processing algorithms.
引文
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[8]徐勤建,刘望锁,姚直象.高速串行数据通信接收芯片CY78933的原理及应用.国外电子元器件.2002(1):32-35页
[9]徐勤建,林怀清.高速串行数据通信发送芯片CY78923的原理及应用.国外电子元器件.2001(8):27-29页
[10]高进,谢艳,覃宗厚.基于FPGA的CY78923/933复用/解复用器在光纤通信中的应用.光通信技术.2007(3):40-41页
[11]章平.高速串行数据收发器CY78923/933及应用.电子技术应用.2001(6):76-78页
[12]刘永志,王芙蓉,黄本雄.使用CY789332—400实现DVB2ASI接收系统的解码.电信科学.2001(4):69-70页
[13]向冰.高速图像串行总线传输.现代电子技术.2006(24):97-100页
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[22]Analog Device JTAG Emulation Technical Reference.Analog Devices Inc.,2004:1-8P
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[25]ADSP-TS20xS TigerSHARC(?) Processor Boot Loader Kernels Operation.Analog Devices Inc.,2004:1-9P
[26]ADSP-TS20xS TigerSHRAC(?) Processor On-chip SDRAM Controller.Analog Devices Inc.,2004:5-10P
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[28]Cyclone Ⅱ Device Handbook.Altera Corporation,2005:3P
[29]PICMG 2.0 R3.0 CompaetPCI Specification.PICMG,1999:15-42P
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[31]熊科.数字阵雷达总体方案与高速数据传输的研究.西安电子科技大学.硕士学位论文.2007:18-21页
[32]王德勇.基于DSP的信号处理板的研制.西安电子科技大学.硕士学位 论文.2006:14-16页
[33]巫幪.通用信号处理板卡的CPCI总线接口设计和驱动开发.西安电子科技大学.硕士学位论文.2007:5-7页
[34]石婷.基于FPGA的图像预处理及DSP_CPCI桥接设计.西安电子科技大学.硕士学位论文.2007:15-17页
[35]PCI9656BA Data Book.Version1.1.PLX Technology Inc.,2003
[36]竺红伟,邢孟道,夏际金.实时信号处理系统CPCI接口设计.雷达科学与技术.2006(4):228-232页
[37]徐建,戴紫彬.PCI9656型64位PCI总线接口电路及其应用.国外电子元器件.2005(8):54-56页
[38]贺迎芳.基于PCI总线的高速数据传输技术的设计与实现.国防科学技术大学.硕士学位论文.2002:12-16页
[39]CompactPCI 9656RDK-860 Hardware Reference Manual.Version1.1.PLX Technology Inc.,2004
[40]PCI 9656RDK-LITE Hardware Reference Manual.Versionl.4.PLX Technology Inc.,2006
[41]PLX PCI 9000 Series EEPROM Cross Reference List.Version5.0.PLX Technology Inc.,2005
[42]周润景、景晓松、赵俊奇.OrCAD&PADS高速电路板设计与仿真.电子工业出版社,2007:292-293页
[43]Eric Bogatin.信号完整性分析.李玉山等译.电子工业出版社,2005:1-25页,122-329页
[44]Stephen H.Hall,GarreR w.Hall,James A.McCall.高速数字系统设计.伍微等译.机械工业出版社,2005:1-48页
[45]Howard Johnson,Martin Graham.高速数字设计.沈立等译.电子工业出版社,2004:106-231页
[46]Douglas Brooks.信号完整性问题和印制电路板设计.刘雷波等译.机械工业出版社,2005:77-174页
[47]久保寺忠.高速数字电路设计与安装技巧.冯杰等译.科学出版社,2006
[48]张海凤.HyperLynx仿真与PCB设计.机械工业出版社,2005:1-212页
[49]LineSim~(?) User Guide.Mentor Graphics Corporation,2006
[50]BoardSim~(?) User Guide.Mentor Graphics Corporation,2006
[51]James R.Armstrong,F.Gail Gray.VHDL设计:表示和综合(原书第二版).李宗伯,王蓉晖等译.机械工业出版社,2002
[52]吴继华,王诚.Altera FPGA/CPLD设计(高级篇).人民邮电出版社,2005
[53]任爱锋.基于FPGA的嵌入式系统设计.西安电子科技大学出版社,2004
[54]刘书明,罗勇江.ADSP TS20xS系列DSP原理与应用设计.电子工业出版社,2007:323-341页
[55]Link-Port Reference Design.Altera Corporation,2003:1-10P
[56]HOTLink~(TM) CY7B933 RDYn Pin Description.Cypress Semiconductor Corporation,1999:1-4P
[57]Implementing a reframe controller for the CY7B933 hotlink receiver in a CY7C37032 CPLD.Cypress Inc.,1999:1-8P
[58]Hotlink Copper Interconnect Maximum Length vs.Frequency.Cypress Inc.,1999
[59]宋捷.基于CPCI的高速大容量存储器研制.西安电子科技大学.硕士学位论文.2006:38-41页
[2]徐甲同,李学干.并行处理技术.西安电子科技大学出版社,1999
[3]张德富.并行处理技术.南京大学出版社,1992
[4]唐晓琪,颜健.可配置处理器阵列在WiMAX基站中胜出.电子工程专辑.2005(8):22-23页
[5]PC102 Product Brief.picoChip.Inc.,2005:1-3P
[6]CY7B923/CY7B933 HOTLink(?) Transmitter/Receiver.Cypress Semi -conductor Corporation,2005:1-13P
[7]宋克柱,王砚方.CY78923/933的原理及其在光纤通信中的应用.电子技术.2000(12):22-24页
[8]徐勤建,刘望锁,姚直象.高速串行数据通信接收芯片CY78933的原理及应用.国外电子元器件.2002(1):32-35页
[9]徐勤建,林怀清.高速串行数据通信发送芯片CY78923的原理及应用.国外电子元器件.2001(8):27-29页
[10]高进,谢艳,覃宗厚.基于FPGA的CY78923/933复用/解复用器在光纤通信中的应用.光通信技术.2007(3):40-41页
[11]章平.高速串行数据收发器CY78923/933及应用.电子技术应用.2001(6):76-78页
[12]刘永志,王芙蓉,黄本雄.使用CY789332—400实现DVB2ASI接收系统的解码.电信科学.2001(4):69-70页
[13]向冰.高速图像串行总线传输.现代电子技术.2006(24):97-100页
[14]HOTLink~(TM) Design Considerations.Cypress Semiconductor Corpora -tion,1999:19-21P
[15]Interfacing the CY7B923 and CY7B933(HOTLink~(TM)) to Clocked FIFOs.Cypress Semiconductor Corporation,1999:1-6P
[16]Interfacing the CY7B923 and CY7B933(HOTLink~(TM)) to a Wide Data Clocked FIFO.Cypress Semiconductor Corporation,1999:1-8P
[17]TMS320C672x Floating-Point DSPs(Rev.E).Texas Instruments,2008:1-7P
[18]TMS320C6455 Fixed-Point Digital Signal Processor(Rev.H).Texas Instruments,2007:1-7P
[19]ADSP-TS201 TigerSHARC(?) Processor Hardware Reference.Analog Devices Inc.,2004:4-7P
[20]TigerSHARC(?) Embedded Processor ADSP-TS203S.Analog Devices Inc.,2006:1-10P
[21]ADSP-TS201 EZ-KIT Lite Manual(R3.1).Analog Devices Inc.,2007:73-87P
[22]Analog Device JTAG Emulation Technical Reference.Analog Devices Inc.,2004:1-8P
[23]Markus Levy.TigerSHARC Swallows DRAM.Microprocessor Report,2003:1-3P
[24]ADSP-TS20xS TigerSHARC(?) System Design Guidelines(R6.0).Analog Devices Inc.,2006:1-11P
[25]ADSP-TS20xS TigerSHARC(?) Processor Boot Loader Kernels Operation.Analog Devices Inc.,2004:1-9P
[26]ADSP-TS20xS TigerSHRAC(?) Processor On-chip SDRAM Controller.Analog Devices Inc.,2004:5-10P
[27]SDRAM Selection and Configuration Guidelines for ADI Processors.Analog Devices Inc.,2004:3-8P
[28]Cyclone Ⅱ Device Handbook.Altera Corporation,2005:3P
[29]PICMG 2.0 R3.0 CompaetPCI Specification.PICMG,1999:15-42P
[30]王伟楠.基于PCI/CPCI总线的高速数据采集卡的设计与实现.西安电子科技大学.硕士学位论文.2004:12-13页
[31]熊科.数字阵雷达总体方案与高速数据传输的研究.西安电子科技大学.硕士学位论文.2007:18-21页
[32]王德勇.基于DSP的信号处理板的研制.西安电子科技大学.硕士学位 论文.2006:14-16页
[33]巫幪.通用信号处理板卡的CPCI总线接口设计和驱动开发.西安电子科技大学.硕士学位论文.2007:5-7页
[34]石婷.基于FPGA的图像预处理及DSP_CPCI桥接设计.西安电子科技大学.硕士学位论文.2007:15-17页
[35]PCI9656BA Data Book.Version1.1.PLX Technology Inc.,2003
[36]竺红伟,邢孟道,夏际金.实时信号处理系统CPCI接口设计.雷达科学与技术.2006(4):228-232页
[37]徐建,戴紫彬.PCI9656型64位PCI总线接口电路及其应用.国外电子元器件.2005(8):54-56页
[38]贺迎芳.基于PCI总线的高速数据传输技术的设计与实现.国防科学技术大学.硕士学位论文.2002:12-16页
[39]CompactPCI 9656RDK-860 Hardware Reference Manual.Version1.1.PLX Technology Inc.,2004
[40]PCI 9656RDK-LITE Hardware Reference Manual.Versionl.4.PLX Technology Inc.,2006
[41]PLX PCI 9000 Series EEPROM Cross Reference List.Version5.0.PLX Technology Inc.,2005
[42]周润景、景晓松、赵俊奇.OrCAD&PADS高速电路板设计与仿真.电子工业出版社,2007:292-293页
[43]Eric Bogatin.信号完整性分析.李玉山等译.电子工业出版社,2005:1-25页,122-329页
[44]Stephen H.Hall,GarreR w.Hall,James A.McCall.高速数字系统设计.伍微等译.机械工业出版社,2005:1-48页
[45]Howard Johnson,Martin Graham.高速数字设计.沈立等译.电子工业出版社,2004:106-231页
[46]Douglas Brooks.信号完整性问题和印制电路板设计.刘雷波等译.机械工业出版社,2005:77-174页
[47]久保寺忠.高速数字电路设计与安装技巧.冯杰等译.科学出版社,2006
[48]张海凤.HyperLynx仿真与PCB设计.机械工业出版社,2005:1-212页
[49]LineSim~(?) User Guide.Mentor Graphics Corporation,2006
[50]BoardSim~(?) User Guide.Mentor Graphics Corporation,2006
[51]James R.Armstrong,F.Gail Gray.VHDL设计:表示和综合(原书第二版).李宗伯,王蓉晖等译.机械工业出版社,2002
[52]吴继华,王诚.Altera FPGA/CPLD设计(高级篇).人民邮电出版社,2005
[53]任爱锋.基于FPGA的嵌入式系统设计.西安电子科技大学出版社,2004
[54]刘书明,罗勇江.ADSP TS20xS系列DSP原理与应用设计.电子工业出版社,2007:323-341页
[55]Link-Port Reference Design.Altera Corporation,2003:1-10P
[56]HOTLink~(TM) CY7B933 RDYn Pin Description.Cypress Semiconductor Corporation,1999:1-4P
[57]Implementing a reframe controller for the CY7B933 hotlink receiver in a CY7C37032 CPLD.Cypress Inc.,1999:1-8P
[58]Hotlink Copper Interconnect Maximum Length vs.Frequency.Cypress Inc.,1999
[59]宋捷.基于CPCI的高速大容量存储器研制.西安电子科技大学.硕士学位论文.2006:38-41页