基于FPGA的图像采集与处理系统设计
摘要
在图像采集处理系统中,实时性要求往往是系统的重要性能。本文在分析研究视频图像的处理技术及方法的基础上,应用嵌入式系统设计和图像处理技术,提出了一种以FPGA芯片作为处理器的嵌入式并行视频图像数据处理系统的设计方案。
本文主要研究的内容有：
1.分析研究了视频图像数据采集方法,设计了图像采集的软硬件系统,在硬件电路上,设计了图像采集卡,并通过工2C总线对图像采集卡的工作模式进行配置,在采集模块的控制下,把采集到的图像存到SRAM中。在软件设计上,采用模块化的设计方法,将系统划分为异步FIFO模块、图像空间转换模块、显示接口控制模块、SRAM存储控制模块、图像预处理模块等几个组成部分,较好地解决了图像采样存储、处理的问题,并为以后系统功能的扩展奠定了良好的基础。
2.分析研究了线性与非线性滤波几种图像处理算法,在比较了几种滤波算法优缺点的基础上,提出一种适合于FPGA的快速图像中值滤波算法,并给出该算法的硬件实现结构图,运用VHDL硬件描述语言编程实现,仿真结果表明,这种快速中值滤波算法的处理速度较之传统算法有很大的提高,有效地增强了图像处理系统的实时性。
3.研究了基于视频的图像检测算法,重点讨论了背景差分法。利用背景差图像直方图统计的方法确定二值化的阈值,并对图像进行二值化。结合嵌入式系统处理技术,在FPGA系统上利用VHDL语言设计实现了这些算法,并对各个模块及相应算法做了功能仿真和性能分析。
4.系统仿真和验证是整个FPGA设计流程中非常重要的步骤,在现有仿真工具中,若手动设置仿真输入波形不仅工作量大而且效率低。针对这一缺点,本文采用了一种VHDL测试台(test bench)方法解决系统输入源仿真问题,使用TEXTIO程序包设计了Matlab与FPGA仿真软件的接口,很好地解决了系统仿真测试中因测试向量大而难以手动输入的问题。并将系统的仿真结果数据导出在Matlab上还原为图像,方便了系统测试结果的分析与调试。
本文利用FPGA的并行处理和流水线技术,研究与设计的视频图像采集与处理系统占用系统资源少,处理速度高,实时性能的,具有较好的实用价值和推广应用前景。
In the image acquisition and processing systems, real-time requirement is often an important performance of the system. This paper applies embedded system design and image processing technology and presents a FPGA chip as the processor's embedded parallel video image data processing system design on the base of the analysis of video image processing techniques and methods.
In this paper, the study includes:
First, this paper analysises the video image data acquisition methods, and designs image acquisition hardware and software system. On the hardware circuit, this paper designs the image acquisition card, and through I2C bus on the mode of image acquisition card configuration, under the control of the acquisition module, the images are deposited in the SRAM. In software design, this paper applies modular design, the system is composed of asynchronous FIFO model, image space converting module, SRAM imaging storing control module, image pre-processing module. It resolved the problems such as image sampling store and processing.
Second, this paper analysises some of the linear and nonlinear filtering image processing algorithms. A fast image median filtering algorithm is proposed in the paper based on the advantages and disadvantages of those filtering algorithms. it is provided that fast median filter on FPGA for image low-level processing and its hardware structure diagram, then realizes it by VHDL language. The results show that this fast median filter can lower the system resources share and promote system speed, enhance real-time performance.
Third, research based on the video image detection algorithm, focusing on the statistical background subtraction method, image binarization. Using VHDL language implements them on the FPGA, and made functional simulation and performance analysis.
Finally, system simulation and verification is a very important step in the FPGA design flow. If manually set the simulation input waveform, it will be a heavy workload and low efficiency. In this paper, VHDL test bench and TEXTIO package are used to resolve this problem. It can be a good solution to this problem. The test bench output the simulation results, and then display in the Matlab.
In this paper, it make use of FPGA's parallel processing and pipelining technology, research and design the video image acquisition and processing system of occupying less system resources, high speed, real-time performance and it has practical value and application prospect.
本文主要研究的内容有：
1.分析研究了视频图像数据采集方法,设计了图像采集的软硬件系统,在硬件电路上,设计了图像采集卡,并通过工2C总线对图像采集卡的工作模式进行配置,在采集模块的控制下,把采集到的图像存到SRAM中。在软件设计上,采用模块化的设计方法,将系统划分为异步FIFO模块、图像空间转换模块、显示接口控制模块、SRAM存储控制模块、图像预处理模块等几个组成部分,较好地解决了图像采样存储、处理的问题,并为以后系统功能的扩展奠定了良好的基础。
2.分析研究了线性与非线性滤波几种图像处理算法,在比较了几种滤波算法优缺点的基础上,提出一种适合于FPGA的快速图像中值滤波算法,并给出该算法的硬件实现结构图,运用VHDL硬件描述语言编程实现,仿真结果表明,这种快速中值滤波算法的处理速度较之传统算法有很大的提高,有效地增强了图像处理系统的实时性。
3.研究了基于视频的图像检测算法,重点讨论了背景差分法。利用背景差图像直方图统计的方法确定二值化的阈值,并对图像进行二值化。结合嵌入式系统处理技术,在FPGA系统上利用VHDL语言设计实现了这些算法,并对各个模块及相应算法做了功能仿真和性能分析。
4.系统仿真和验证是整个FPGA设计流程中非常重要的步骤,在现有仿真工具中,若手动设置仿真输入波形不仅工作量大而且效率低。针对这一缺点,本文采用了一种VHDL测试台(test bench)方法解决系统输入源仿真问题,使用TEXTIO程序包设计了Matlab与FPGA仿真软件的接口,很好地解决了系统仿真测试中因测试向量大而难以手动输入的问题。并将系统的仿真结果数据导出在Matlab上还原为图像,方便了系统测试结果的分析与调试。
本文利用FPGA的并行处理和流水线技术,研究与设计的视频图像采集与处理系统占用系统资源少,处理速度高,实时性能的,具有较好的实用价值和推广应用前景。
In the image acquisition and processing systems, real-time requirement is often an important performance of the system. This paper applies embedded system design and image processing technology and presents a FPGA chip as the processor's embedded parallel video image data processing system design on the base of the analysis of video image processing techniques and methods.
In this paper, the study includes:
First, this paper analysises the video image data acquisition methods, and designs image acquisition hardware and software system. On the hardware circuit, this paper designs the image acquisition card, and through I2C bus on the mode of image acquisition card configuration, under the control of the acquisition module, the images are deposited in the SRAM. In software design, this paper applies modular design, the system is composed of asynchronous FIFO model, image space converting module, SRAM imaging storing control module, image pre-processing module. It resolved the problems such as image sampling store and processing.
Second, this paper analysises some of the linear and nonlinear filtering image processing algorithms. A fast image median filtering algorithm is proposed in the paper based on the advantages and disadvantages of those filtering algorithms. it is provided that fast median filter on FPGA for image low-level processing and its hardware structure diagram, then realizes it by VHDL language. The results show that this fast median filter can lower the system resources share and promote system speed, enhance real-time performance.
Third, research based on the video image detection algorithm, focusing on the statistical background subtraction method, image binarization. Using VHDL language implements them on the FPGA, and made functional simulation and performance analysis.
Finally, system simulation and verification is a very important step in the FPGA design flow. If manually set the simulation input waveform, it will be a heavy workload and low efficiency. In this paper, VHDL test bench and TEXTIO package are used to resolve this problem. It can be a good solution to this problem. The test bench output the simulation results, and then display in the Matlab.
In this paper, it make use of FPGA's parallel processing and pipelining technology, research and design the video image acquisition and processing system of occupying less system resources, high speed, real-time performance and it has practical value and application prospect.
引文
[1]刘焕军,王耀南,段锋.机器视觉中的图像采集技术.电脑与信息技术.2003,1.
[2]冈萨雷斯.数字图像处理.第2版.北京：电子工业出版社,2003,1-2.
[3]龚剑.基于FPGA的图像处理系统：武汉科技大学硕士学位论文.武汉：武汉科技大学,2007,2-3.
[4]黄爱民,安向京,骆力.数字图像处理与分析基础.北京：中国水利水电出版社,2005.
[5]冯柳.基于FPGA的图像处理算法的研究与设计：西安交通大学硕士学位论文.西安：西安交通大学,2008,2-4.
[6]Athanas P M, Silverman F H.An adaptive hardware machine architecture and compiler for dynamic processor reconfiguration.IEEE International Conference on Computer Design VLSI Compute Processors, America,1991:397-400.
[7]Lazarus R B, Meyer F M.Realization of a dynamically reconfigurable reprocessor.IEEE National Aerospace Electron Conference.America, 1993:74-80.
[8]Chan S C, Ngai H O,Ho K L.A programmable image processing system using FPGAs.1994 IEEE International Symposium,London,1994:125-128.
[9]王诚,吴继华,范丽珍等.Altera FPGA/CPLD设计.北京：人民邮电出版社,2005,30-58.
[10]郑亚民,董晓舟.可编程逻辑器件开发软件Quartus Ⅱ.北京：国防工业出版社,2006,46-47.
[11]王毅平,张振荣.VHDL编程与仿真.北京：人民邮电出版社,2000.
[12]辛春艳.VHDL硬件描述语言.北京：国防工业出版社,2002.
[13]孙成志,解梅,傅海东.基于FPGA的图像采集模块设计.单片机与嵌入式系统应用,2008,11：51-53,56.
[14]沈华,王俞心.基于FPGA的I2C总线主控器的设计与实现.航空计算技术,2007,37(6)：109-111.
[15]刘韬,楼兴华.FPGA数字电子系统设计与开发实例导航.北京：人民邮电出版社,2005.
[16]Intersil.BT.656 Video Interface for ICs.Application Note.2002.
[17]姜华.基于FPGA的图像采集处理系统设计与实现：大连海事大学硕士学位论文.大连：大连海事大学,2009,50-51.
[18]贾永红.数字图像处理.武汉：武汉大学出版社,2003.
[19]Kenneth.R.Cast.Leman.Digital Image Proceesing.Publishing House of Electronics Industry,2002.
[20]W.Pratt.Digital Image Processing,2nd Edition.John Wiley,1991.
[21]Maheshwari R., Rao S.S.S.P., Poonacha P.G. FPGA implementation of median filter. Tenth International Conference on VLSI Design, June,1997, PP.523-524.
[22]Sara Baase,Allen Van Gelder.计算机算法-设计与分析导论.北京：高等教育出版社,2001.
[23]李元帅,张勇,周国忠等.图像中值滤波硬件算法及其在FPGA中的实现.计算机应用,2006,26(6)：61-62,75.
[24]张德丰.MATLAB数字图像处理.北京：机械工业出版社,2009.
[25]Peter J.Ashenden.VHDL设计指南.北京：机械工业出版社,2005.403-425.
[26]王宇新,贺圆圆,郭禾等.基于FPGA的快速中值滤波算法.计算机应用研究,2009,26(1)：224-226.
[27]张杰.基于FPGA的数字图像处理：武汉科技大学硕士学位论文.武汉：武汉科技大学,2009,25-26.
[28]邵应昭,任爱锋,初秀琴.基于FPGA的视频监控系统.电子技术应用,2008,5：20-22.
[29]EDA先锋工作室.Altera FPGA-CPLD设计.北京：人民邮电出版社.2005
[30]吴自信,张嗣忠.异步FIFO结构及FPGA设计.单片机与嵌入式系统.2003,8：24-30.
[31]施阳,李俊.MATLAB工具箱-TOOLBOX使用指南.西安：西北工业大学出版社,1998.
[32]沙燕萍,皇甫伟,曾烈光.异步FIFO的VHDL设计.电子技术应用,2001,6：74-75.
[33]Hu Yueli,Ji Huijie,Wu Pin.Research on Image Filtering Algorithm and Its FPGA implementation.Computer Measurement & Control,2008,16(11):1672-1675.
[34]宁媛,李皖.图像去噪的几种方法分析比较.贵州工业大学学报(自然科学版).2005,34(4)：63-66.
[35]Chang J J. Modified 2D median filter for impulse noise suppression in a real-time system.IEEE Transactions on Consumer Electronics,1995,41(1):73-80.
[36]孙浩.基于ARM和FPGA的嵌入式高速图像采集存储系统.电子科技,2009,22(2)：5-7.
[37]何江远.基于FPGA的视频图像检测技术的研究与应用：东华大学硕士学位论文.上海：东华大学,2007,68-70.
[38]NGPE, MAKK. A switching median filter with boundary discriminative niose detection for extremely corrupted images. IEEE Transactions on Image Processing,2006,15(6):1506-1516.
[39]赵振甲.使用FIFO完成数据传输与同步.中国集成电路,2005,8：49-51.
[40]周志权,刘瑾.基于FPGA的实时图像预处理系统的设计.华北航天工业学院学报,2005,159130：20-22.
[41]于红旗,仲涛.TEXTIO及其在VHDL仿真中的应用.单片机与嵌入式系统应用,2004,4：81-83.
[42]孔祥刚,诸静,阳涛.SAA7113H在视频采集接口设计中的应用.电子技术,2003,12：26-29.
[43]Chien S Y,Ma SY,Chen L G.Efficient moving object segmentation algorithm using background registration technique.IEEE Transactions on Circuits and Systems for Video Technology,2002,12(7):577-586.
[44]潘峰,李广喜,刘文予.MATLAB在图像处理与研究中的应用.计算机应用研究,1999,12：73.
[45]伞景辉,孙广富.SAA7111A中I2C总线控制器的FPGA实现.微处理机,2004,8(4)：3-6.
[46]J.Barron, D.Fleet, S.Beauchemin.Performance of optical flow techniques. International Journal of Computer Vision,1994,12(1),42-77.
[47]R.C.Gonzalez R.E.Woods.Digital Image Processing.Addisom-Wesley Pub Co, 2nd Edition,2002.
[48]F.M.Alzahrani, T.Chen.A Real-Time Edge Detector:Algorithmand VLSI Architecture.Real-Time Imaging,1997,3(5):363-378.
[49]R.R.Rakesh, P.Chaudhuri, C.A.Murthy.Thresholding in Edge Detection:A Statistical Approach.IEEE Trans.Image Processing,2004,13(7):927-936.
[2]冈萨雷斯.数字图像处理.第2版.北京：电子工业出版社,2003,1-2.
[3]龚剑.基于FPGA的图像处理系统：武汉科技大学硕士学位论文.武汉：武汉科技大学,2007,2-3.
[4]黄爱民,安向京,骆力.数字图像处理与分析基础.北京：中国水利水电出版社,2005.
[5]冯柳.基于FPGA的图像处理算法的研究与设计：西安交通大学硕士学位论文.西安：西安交通大学,2008,2-4.
[6]Athanas P M, Silverman F H.An adaptive hardware machine architecture and compiler for dynamic processor reconfiguration.IEEE International Conference on Computer Design VLSI Compute Processors, America,1991:397-400.
[7]Lazarus R B, Meyer F M.Realization of a dynamically reconfigurable reprocessor.IEEE National Aerospace Electron Conference.America, 1993:74-80.
[8]Chan S C, Ngai H O,Ho K L.A programmable image processing system using FPGAs.1994 IEEE International Symposium,London,1994:125-128.
[9]王诚,吴继华,范丽珍等.Altera FPGA/CPLD设计.北京：人民邮电出版社,2005,30-58.
[10]郑亚民,董晓舟.可编程逻辑器件开发软件Quartus Ⅱ.北京：国防工业出版社,2006,46-47.
[11]王毅平,张振荣.VHDL编程与仿真.北京：人民邮电出版社,2000.
[12]辛春艳.VHDL硬件描述语言.北京：国防工业出版社,2002.
[13]孙成志,解梅,傅海东.基于FPGA的图像采集模块设计.单片机与嵌入式系统应用,2008,11：51-53,56.
[14]沈华,王俞心.基于FPGA的I2C总线主控器的设计与实现.航空计算技术,2007,37(6)：109-111.
[15]刘韬,楼兴华.FPGA数字电子系统设计与开发实例导航.北京：人民邮电出版社,2005.
[16]Intersil.BT.656 Video Interface for ICs.Application Note.2002.
[17]姜华.基于FPGA的图像采集处理系统设计与实现：大连海事大学硕士学位论文.大连：大连海事大学,2009,50-51.
[18]贾永红.数字图像处理.武汉：武汉大学出版社,2003.
[19]Kenneth.R.Cast.Leman.Digital Image Proceesing.Publishing House of Electronics Industry,2002.
[20]W.Pratt.Digital Image Processing,2nd Edition.John Wiley,1991.
[21]Maheshwari R., Rao S.S.S.P., Poonacha P.G. FPGA implementation of median filter. Tenth International Conference on VLSI Design, June,1997, PP.523-524.
[22]Sara Baase,Allen Van Gelder.计算机算法-设计与分析导论.北京：高等教育出版社,2001.
[23]李元帅,张勇,周国忠等.图像中值滤波硬件算法及其在FPGA中的实现.计算机应用,2006,26(6)：61-62,75.
[24]张德丰.MATLAB数字图像处理.北京：机械工业出版社,2009.
[25]Peter J.Ashenden.VHDL设计指南.北京：机械工业出版社,2005.403-425.
[26]王宇新,贺圆圆,郭禾等.基于FPGA的快速中值滤波算法.计算机应用研究,2009,26(1)：224-226.
[27]张杰.基于FPGA的数字图像处理：武汉科技大学硕士学位论文.武汉：武汉科技大学,2009,25-26.
[28]邵应昭,任爱锋,初秀琴.基于FPGA的视频监控系统.电子技术应用,2008,5：20-22.
[29]EDA先锋工作室.Altera FPGA-CPLD设计.北京：人民邮电出版社.2005
[30]吴自信,张嗣忠.异步FIFO结构及FPGA设计.单片机与嵌入式系统.2003,8：24-30.
[31]施阳,李俊.MATLAB工具箱-TOOLBOX使用指南.西安：西北工业大学出版社,1998.
[32]沙燕萍,皇甫伟,曾烈光.异步FIFO的VHDL设计.电子技术应用,2001,6：74-75.
[33]Hu Yueli,Ji Huijie,Wu Pin.Research on Image Filtering Algorithm and Its FPGA implementation.Computer Measurement & Control,2008,16(11):1672-1675.
[34]宁媛,李皖.图像去噪的几种方法分析比较.贵州工业大学学报(自然科学版).2005,34(4)：63-66.
[35]Chang J J. Modified 2D median filter for impulse noise suppression in a real-time system.IEEE Transactions on Consumer Electronics,1995,41(1):73-80.
[36]孙浩.基于ARM和FPGA的嵌入式高速图像采集存储系统.电子科技,2009,22(2)：5-7.
[37]何江远.基于FPGA的视频图像检测技术的研究与应用：东华大学硕士学位论文.上海：东华大学,2007,68-70.
[38]NGPE, MAKK. A switching median filter with boundary discriminative niose detection for extremely corrupted images. IEEE Transactions on Image Processing,2006,15(6):1506-1516.
[39]赵振甲.使用FIFO完成数据传输与同步.中国集成电路,2005,8：49-51.
[40]周志权,刘瑾.基于FPGA的实时图像预处理系统的设计.华北航天工业学院学报,2005,159130：20-22.
[41]于红旗,仲涛.TEXTIO及其在VHDL仿真中的应用.单片机与嵌入式系统应用,2004,4：81-83.
[42]孔祥刚,诸静,阳涛.SAA7113H在视频采集接口设计中的应用.电子技术,2003,12：26-29.
[43]Chien S Y,Ma SY,Chen L G.Efficient moving object segmentation algorithm using background registration technique.IEEE Transactions on Circuits and Systems for Video Technology,2002,12(7):577-586.
[44]潘峰,李广喜,刘文予.MATLAB在图像处理与研究中的应用.计算机应用研究,1999,12：73.
[45]伞景辉,孙广富.SAA7111A中I2C总线控制器的FPGA实现.微处理机,2004,8(4)：3-6.
[46]J.Barron, D.Fleet, S.Beauchemin.Performance of optical flow techniques. International Journal of Computer Vision,1994,12(1),42-77.
[47]R.C.Gonzalez R.E.Woods.Digital Image Processing.Addisom-Wesley Pub Co, 2nd Edition,2002.
[48]F.M.Alzahrani, T.Chen.A Real-Time Edge Detector:Algorithmand VLSI Architecture.Real-Time Imaging,1997,3(5):363-378.
[49]R.R.Rakesh, P.Chaudhuri, C.A.Murthy.Thresholding in Edge Detection:A Statistical Approach.IEEE Trans.Image Processing,2004,13(7):927-936.