高性能计算机无缓存光互连网络技术研究
详细信息    本馆镜像全文|  推荐本文 |  |   获取CNKI官网全文
摘要
作为解决大规模计算问题的重要手段,高性能计算机被越来越广泛地应用到科学与工程的各个领域。随着高性能计算技术的发展,高性能并行计算机的规模不断扩大,对系统性能的要求也不断提高。当前,提高大规模并行计算机的性能主要从两个方面着手:单个计算结点性能的提高以及连接各计算结点的高速互连网络的优化与改进。随着并行计算机规模的不断增大,需要在更多的计算结点之间实现高效的互连,这对其内部的高速互连网络提出了更高的要求。如何设计大规模并行计算机内部的高带宽、高吞吐率、低延时的互连网络,提高结点互连的效率和性能,已成为高性能计算机体系结构研究领域中亟待解决的重点和难点问题。
     在高速数据传输环境下,以铜导线为传输介质的的电互连网络存在带宽低,功耗高,抗干扰能力差,互连密度小等不足,成为制约并行互连网络性能进一步提高的瓶颈。光互连技术作为一种新的互连方式,具有带宽高、功耗低、延时小、抗干扰等许多电互连不可比拟的优点,成为并行计算机高速互连网络的研究热点之一。但是,在当前技术条件下,由于无法有效地实现光信号的缓存和逻辑处理,在一般的光互连系统中,需要在网络中间结点上将到达的光信号转换为电信号再进行路由判断和缓存,这势必引入额外的传输延时。本文以降低光互连的额外开销,提高互连网络的实际性能为目标,针对当前光互连技术遇到的障碍,研究了高性能计算机内部无缓存的高速光互连网络技术,提出了一种不需要在中间结点进行光电转换的无缓存的光互连网络结构BOIN(Bufferless Optical Interconnection Network),研究了其路由算法及其容错技术,同时对BOIN网络的性能进行了建模分析和优化设计。论文的主要研究成果包括以下几个方面:
     1、针对当前光互连网络中无法进行有效的光缓存以及直接逻辑判断的不足,提出了一种不需要在中间结点上将光信号转换为电信号并进行缓存排队和路由选择的BOIN光互连结构。在BOIN网络中,光数据报文始终在光链路上传输,其在中间结点上的路由判断与选择由与其同步传输的电控制报文实现,从而避免了对光信号进行光电转换。在文中研究了BOIN网络的链路协议及端口冲突解决技术,提出了无死锁/无活锁的路由算法,证明了路由算法的可达性,指出采用该路由算法,BOIN网络中的任何报文都必定在有限的时间内由源结点传输到目的结点,并给出了这个由网络规模所决定的传输延时上限。
     2、为了准确地刻画和评价BOIN网络的性能,本文运用数学工具,分析了网络在各个方向链路上的流量特征,并为其建立了数学模型,得到了BOIN网络在规模和负载一定的情况下,其报文传输平均延时和平均吞吐率等性能指标的解析表达式。同时根据理论分析结果,给出了在一定的网络总规模下网络性能达到最优时其拓扑结构应该满足的条件。模拟结果显示,该模型正确反映了BOIN网络的性能特征,为网络的优化设计提供了分析依据。
     3、BOIN网络是为了实现高性能计算机内部的高速互连而设计的一种光电互连网络结构,因此如何采取有效的方法,切实提高其互连性能,是本文的研究重点之一。文中着重研究了BOIN网络的性能优化技术,包括避免结点饿死的路由算法,以及具有高吞吐率和高链路利用率的BOIN2网络结构。采用BOIN2网络结构,在只需要增加少许硬件资源的条件下,可以获得明显的性能增长。文中研究了BOIN2网络的路由算法,证明了其与标准BOIN网络相类似,同样具有无死锁/无活锁以及有限传输延时上限等性质。模拟结果表明这些性能优化技术能够有效地提升BOIN互连网络的性能,为大规模并行计算机的设计打下良好的基础。
     4、在大规模并行互连网络中,容错性能的高低是对网络整体性能进行评价的重要指标。在本文中,针对大规模BOIN网络中可能存在的结点失效问题,提出了一种FT-BOIN容错光互连网络结构,分析了在FT-BOIN网络中结点间的可达关系及其性质,给出了两个结点间存在可达路径的充要条件,并根据该条件研究了几种具有不同容错性能和复杂度的容错路由算法。实验结果表明FT-BOIN网络具有良好的容错能力,当网络中发生结点失效时,能够在可达结点之间实现无阻塞的路由。
     本文面向高性能计算机内部计算结点间的高速互连,对无缓存的BOIN光互连网络进行了全面的研究,在其拓扑结构、链路协议、路由算法以及性能模型等方面都进行了深入的探索,并且根据性能模型对BOIN网络进行了优化设计,同时还对BOIN网络中的容错路由技术进行了研究。上述研究成果对高性能计算机内部互连网络中遇到的实际问题给出了有效的解决方案,对并行计算机系统结构和互连网络的设计具有一定的理论意义和应用价值。
As an important method for solving large-scale computational problems, more and more high performance computers (HPCs) have been adopted by nearly every fileds of scientific and engineering projects. The scale of parallel HPCs keeps expanding increasingly, and the urgent demand for even much higher performance has never slowed down in accordance with the development of HPC technologies. At present, improvements of the computing nodes as well as the optimization of interconnect networks are two main approaches to boost HPC’s performance. Computing nodes need more efficient communication when a HPC scales larger, which requires even more support of the interonnect networks. How to design a high-bandwidth, low-latency and high-throughput interconnect network and how to improve its efficiency have become the key problems of HPC researchers.
     The electrical interconnection networks based on copper wires exhibit some disadvantages such as low bandwidth, high power dissipation, poor immunity against EMI and low-density as data transfer rate becomes higher, which are the key bottlenecks to improve its performance. Optical interconnection network is a new method for connecting thousands of computing nodes together within a HPC. It has many advantages such as higher bandwidth, lower power dissipation, higher immunity against EMI and lower packet delay, which are incomparable with its electrical competitor. Therefore optical interconnection network has become a hotspot in the study of high speed interconnection networks for HPCs. However, current technology lacks the ability of buffering and processing optical signals. In traditional practice, O/E and E/O conversions are used for buffering signals and performing routing procedures, which introduce a large amount of overheads. Aiming at lowering the overheads of optical interconnection networks and improving its efficiency, this dissertation focuses on the study of high speed bufferless optical interconnect networks for HPC, and put forward a new optical interconnection network model named Bufferless Optical Interconnection Network (BOIN). A BOIN network needs neither O/E and E/O conversion nor optical buffering on intermediate nodes, which can overcome the efficiency problems in current optical interconnection networks. Besides studying its routing algorithms and fault-tolerance capacities, this dissertation also gives out a performance model to evaluate the performance of BOIN network. The main contributions of this dissertation are listed below.
     1. To overcome the traditional deficiency of optical signals buffering and direct logic processing, a new optical interconnection network architecture ? BOIN ? was put forward, within which O/E and E/O conversion and optical buffers on intermediate nodes are avoided. In a BOIN network, O/E and E/O conversion are unnecessary, because optical data packets travel along optical links all the time while routing decisions on intermediate nodes are made according to the synchronized electrical control packets. This dissertation studied on the optical link protocols and methods for port collision avoidance, put forward a livelock-free and deadlock-free routing algorithm, and proved its correctness. Each packet in BOIN will arrive at the destination node within a limited period according to this routing algorithm. The upperbound of delay time is determined by the network size.
     2. To evaluate the performance of a BOIN network, this dissertation analysized the flow characteristics of each optical link in therory and established a mathematical performance model. Performance metrics such as the average transmission delay, throughput and so on, are derived by solving the model. We also studied the conditions BOIN should meet under which the BOIN network can achieve the optimal performance in a certain network size. The simulation results show that the performance model can describe the characteristics of BOIN, which provides a foundation for network optimization.
     3. The BOIN network is a new kind of high speed opto-electric interconnection network for high performance computers. How to boost its efficiency is a key aspect of this dissertation. Several optimization techniques were put forward in this dissertation such as starvation avoiding routing algorithm and BOIN2 network structure which can improve the throughput and link utilization of the network. BOIN2 network can perform much better while a little more hardware resources are added. We studied the routing algorithms of BOIN2 network and proved that similar to the BOIN network, the BOIN2 network also has the characteristics such as livelock-free, deadlock-free and transmission delay upperbounds. Simulation results proved the effectiveness of such optimization techniques. They lay a good fundation for large-scale parallel computer design.
     4. In large-scale parallel interconnect networks, the capability of fault tolerance is very critical for the networks performance. This dissertation also established a fault-tolerant BOIN (FT-BOIN) network to overcome the node failure problems in the BOIN network. The reachability and the properties of the FT-BOIN network are studied, and the sufficient and necessary condition of two nodes can reach each other is put forward. Basing on the analysis, we give out several routing algorithms with different fault-tolerance capability and complexity. It shows that the FT-BOIN network has a quite good fault tolerance, and can perform nonblocking routing between a pair of reachable nodes even if many intermediate nodes fail.
     In conclusion, this dissertation focused on the design of high speed interconnect networks within the high performance computers. It performed thorough study on the bufferless optical interconnect network ? BOIN, explored its topology, link protocols, routing algorithms and performance model. Effective performance optimization techniques based on the model and fault tolerant routing methods were also put forward. These study results not only provide an effective solution for overcoming problems of practical high speed interconnect networks, but also contribute a great deal to parallel computer system architecture and interconnect network design.
引文
[1] National Research Council of the National Academies. Getting Up to Speed - The Future of Supercomputing. The National Academies Press, 2005.
    [2] http://www.top500.org/
    [3] http://www.idg.com/
    [4] Hennessy J L, Patterson D A. Computer Architecture : A Quantitative Approach. 3rd Edition. San Francisco Kaufmann Publish, 2002.
    [5]张以谟.光互连网络技术[M].北京:电子工业出版社, 2006.
    [6] Goodman J W. Optical interconnections for VLSI systems. Proc IEEE, 1984,72(7): 805-866.
    [7] T. Mudge. Power. A first-class architectural design constraint. IEEE Computer, 2001, 34(4):52-58.
    [8] Assaf Shacham. Architectures of Optical Interconnection Networks for High Performance Computing. Columbia University, 2007.
    [9] R. Ramaswami and K. N. Sivarajan. Optical Networks: A Practical Perspective. Morgan Kaufmann, San Francisco, CA, second edition, 2002.
    [10] William J. Dally. Interconnect-Centric Computing. HPCA 2007 Keynote speech, February, 2007.
    [11] A. K. Kodi and A. Louri. Design of a high-speed optical interconnect for scalable shared-memory multiprocessors. IEEE Micro, 2005, 25(1):41-49.
    [12] G. P. Agrawal. Fiber-optic Communication Systems. Wiley and Sons, New York, NY, 2002.
    [13] K. Fukuchi, T. Kasamatsu, M. Morie, R. Ohhira, T. Ito, K. Sekiya, D. Ogasahara, and T. Ono. 10.92-Tb/s (273×40-Gb/s) triple-band/ultra-dense WDM optical-repeatered transmission experiment. In Optical Fiber Communications Conf. (OFC), Mar. 2001.
    [14] Jeffrey Kash. Internal Optical Interconnects in Next Generation High-Performance Servers. IEEE Conference of Avionics Fiber-Optics and Photonics, 2005.
    [15] J. S. Kim, M. B. Taylor, J. Miller, and D. Wentzlaff. Energy characterization of a tiled architecture processor with on-chip networks. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2003.
    [16] Kash, J.A.Doany, F.Kuchta, D.Pepeljugoski, et. al. Terabus: a chip-to-chip parallel optical interconnect. The 18th Annual Meeting of the IEEE Lasers and Electro-Optics Society, 2005. (LEOS 2005).
    [17] J. A. Kash, F. E. Doany, et. al. Chip-to-chip optical interconnects. Optical Fiber Communication Conference 2006 and the 2006 National Fiber Optic EngineersConference. OFC 2006, March 2006.
    [18] http://www.darpa.mil/mto/programs/c2oi/index.html
    [19] Brian E. Lemoff, Mohammed E. Ali, et al. MAUI: Enabling Fiber-to-the-Processor With Parallel Multiwavelength Optical Interconnects. Journal of Lightwave technology, 2004, 22(9).
    [20] Edris Mohammed and et. al. Optical interconnect system integration for ultra-short-reach applications. Intel Technology Journal, 2004, 8(2).
    [21] Kanji Takeuchi. Technical Trends in Optical Interconnection Technology - Towards its Implementation in the“Keisoku”Supercomputer. Science and Technology Trends, Quarterly Review 2006, No. 20.
    [22] R. Bockstaele, M. De Wilde, W. Meeus, et. al. Chip-to-chip parallel optical interconnects over optical backpanels based on arrays of multimode waveguides. Proceedings of the 9th Annual Symposium of the IEEE/LEOS Benelux Chapter Ghent, Belgium, December 2004.
    [23] Takayuki Noguchi. Optical Interconnection Technology for the Next Generation Supercomputer. Symposium for Computational Science and Technology, September 2005.
    [24] http://io.intec.ugent.be/
    [25] P. R. Haugen, et al. Optical Interconnects for High Computing. Opt. Eng. 1988,25(10), pp.1076.
    [26] A. Shacham, B. A. Small, O. Liboiron-Ladouceur, K. Bergman. A fully implemented 12×12 data vortex optical packet switching interconnection network. Journal of Lightwave Technology, 2005, 23(10): 3066-3075.
    [27] Avinash Karanth Kodi, Ahmed Louri. RAPID: Reconfigurable and Scalable All-Photonic Interconnect for Distributed Shared Memory Multiprocessors. Journal of Lightwave Technology, 2004, 22(9).
    [28] C. Hawkins, B. A. Small, D. S. Wills, K. Bergman. The Data Vortex, an all optical path multicomputer interconnection network. IEEE Trans. Parallel Distrib. Syst. 2007, 18(3): 409-420.
    [29] B. A. Small, T. Kato, and K. Bergman. Dynamic power considerations in a complete 12×12 optical packet switching fabric. IEEE Photon. Technol. Lett., 2005, 17(11):2472-2474.
    [30] Qimin Yang, Keren Bergman, et. al. WDM Packet Routing for High-Capacity Data Networks. Journal of Lightwave Technology, 19(10):1420-1426, Oct. 2001.
    [31] A. G. Greenberg, B. Hajek, Deflection routing in hypercube networks. IEEE Transactions on Communications, 1992, 40(6): 1070-1081.
    [32] R. Luijten, C. Minkenberg, B. R. Hemenway, M. Sauer, R. Grzybowski. Viable opto-electronic HPC interconnect fabrics. In ACM/IEEE Conf. Supercomputing (SC05), pp. 18, Nov. 2005.
    [33] C. Minkenberg, I. Iliadis, F. Abel. Low-Latency Pipelined Crossbar Arbitration. Proc. IEEE Globecom 2004, paper GE15-2, Dallas, TX, Nov. 2004.
    [34] Yi Pan, Keqin Li. Linear Array with Reconfigurable Pipelined Bus System - Concepts and Applications. Proceedings of International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA 1996), 1996,1431-1442,.
    [35] S. Q. Zheng, Keqin Li, Yi Pan, M. Cristina Pinotti. Generalized Coincident Pulse Technique and New Addressing Schemes for Time-Division Multiplexing Optical Buses. Journal of Parallel and Distributed Computing, 2001, 61(8): 1033-1051.
    [36] Keqin Li, Yi Pan, Mounir Hamdi. Solving graph theory problems using reconfigurable pipelined optical buses. Parallel Computing, 2000, 26(6): 723-735.
    [37] Yi Pan, Keqin Li. Linear array with a reconfigurable pipelined bus system: concepts and applications. Journal of Information Sciences, 1998,106(3-4): 237-258.
    [38] Keqin Li, Yi Pan, Si Qing Zheng. Fast and Processor Efficient Parallel Matrix Multiplication Algorithms on a Linear Array With a Reconfigurable Pipelined Bus System. IEEE Transactions on Parallel and Distributed System, 9(8), 1998.
    [39] Amitava Datta. Multiple Addition and Prefix Sum on a Linear Array with a Reconfigurable Pipelined Bus System. The Journal of Supercomputing, 2004, 29(3): 303-317.
    [40] Brian J. d’Auriol, L. Susan Draper. A Free Space Optical Bus Parallel Model Framework. Proceedings of the the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), 2005, 27-30.
    [41] Yijie Han, Yi Pan, Hong Shen. Sublogarithmic Deterministic Selection on Arrays with a Reconfigurable Optical Bus. IEEE Transactions on Computers, 2002, 51(6): 702-707.
    [42] Jie Li , Yi Pan , Hong Shen. More Efficient Topological Sort Using Reconfigurable Optical Buses. The Journal of Supercomputing, 2003, 24(3): 251-258.
    [43] Avinash Karanth Kodi, Ahmed Louri. RAPID for High-Performance Computing system: Architecture and Performance Evaluation. OSA Applied Optics, Special Issue on Information Photonics, 2006, 45(25): 6326-6334.
    [44] Chander Kochar, Avinash Kodi, Ahmed Louri. nD-RAPID: A Multi-Dimension Fault-tolerant Opto-Electronic Interconnection for Scalable HPC Systems. Journal of Optical Networking, 2007, 6(5): 465-481.
    [45] Kevin J. Barker , Alan Benner , Ray Hoare , et. al. On the Feasibility of Optical Circuit Switching for High Performance Computing Systems. Proceedings of the 2005 ACM/IEEE conference on Supercomputing, pp.16, November 2005.
    [46] Liboiron-Ladouceur, A. Shacham, B.A. Small, B.G. Lee, H. Wang, C.P. Lai, A.Biberman, K. Bergman. The Data Vortex Optical Packet Switched Interconnection Network. J. Lightwave Technol. 2008, 26(13): 1777-1789.
    [47] A. Shacham and K. Bergman. On Contention Resolution in the Data Vortex Optical Interconnection Network. J. Optical Networking 2007, 6(6): 777-788.
    [48] Assaf Shacham, Keren Bergman, Luca P. Carloni. On the Design of a Photonic Network-on-Chip. Proceedings of the First International Symposium on Networks-on-Chips (NOCS), 2007.
    [49] Hoa Le Minh, Z. Ghassemlooy, Wai Pang Ng. Ultrafast Header Processing in All-Optical Packet Switched-Network. The 7th International Conference on Transparent Optical Networks (ICTON 2005), 2005.
    [50] S. Nakamura, K. Tajima, and Y. Sugimoto. Experimental investigation on high-speed switching characteristics of a novel symmetric Mach-Zehnder all-optical switch. Appl. Phys. Lett., 1994, 65(3): 283-285.
    [51] Husain, A. MEMS - Based Photonic Switching in Communication Networks. In: Optical Fiber Communication Conference, 2001 (OFC 2001).
    [52] Sakata, T et al. Improvement of switching time in a thermocapillarity optical switch. In: Optical Fiber Communication Conference, 2001 (OFC 2001).
    [53] Yariv, A. Optical Electronics in Modern Communications. 5th edition. Oxford University Press, 1997.
    [54] Polymer Liquid Crystals. (Mar 12, 2009) [online].– URL: http://plc.cwru.edu/tutorial/enhanced/files/textbook.htm.
    [55] Ramaswami, R. Sivarajan K N. Optical Networks– A practical perspective, 2nd ed. San Francisco, Morgan Kaufman Publishers, 2001.
    [56] Yamazaki, H., Matsunaga, T., Fukushima, S., Kurokawa, T. Large-scale holographic switch with a ferroelectric liquid-crystalspatial light modulator. Proceedings of Lasers and Electro-Optics Society Annual Meeting , IEEE. 1997, 1:128 - 129.
    [57] J. Gripp, M. Duelk, J.E. Simsarian, A. Bhardwaj, P. Bernasconi, O. Laznicka, M. Zirngibl. Optical switch fabrics for ultra-high-capacity IP routers. J. Lightwave Techn. 2003, 21(11): 2839-2850.
    [58] C.K. Yow, Y.J. Chai, C.W. Tee, R. McDougall, R.V. Penty, I. H. White. All-optical multiwavelength bypassexchange switching using a hybrid-integrated Mach-Zehnder switch. Proc. ECOC 2004, Sept. 2004.
    [59] http://www.trellis-photonics.com
    [60] Q. Xu, S. Manipatruni, B. Schmidt, J. Shakya, M. Lipson. 12.5 Gbit/s carrier-injection-based silicon microring silicon modulators. Optics Express, 2007, 15(2):430–436.
    [61] F. Xia, L. Sekaric, Y. A. Vlasov. Ultracompact optical buffers on a silicon chip. Nature Photonics, 2007, 1(1): 65-71.
    [62] Ansheng Liu, Richard Jones, Ling Liao, et. al. A high-speed silicon optical modulator based on a metal–oxide–semiconductor capacitor. Nature. 2004, 427(12): 615-618.
    [63] C. Gunn. CMOS photonics for high-speed interconnects. IEEE Micro, 2006, 26(2):58-66.
    [64] A. Gupta, S. P. Levitan, L. Selavo, D. M. Chiarulli. High-speed optoelectronics receivers in SiGe. In 17th Intl. Conf. on VLSI Design, 2004:957-960.
    [65] Joong-Seon Choe, Yong-Hwan Kwon, et. al. 40 Gbps Electroabsorption Modulated DFB Laser with Tilted Facet Formed by Dry Etching. Semicond. Sci. Technol. 2007, 22(7): 802-805.
    [66] Q. Xu, B. Schmidt, S. Pradhan, M. Lipson. Micrometrescale silicon electro-optic modulator. Nature, 2005, 435:325–327.
    [67] Li Baoxia , Hu Xiaohua , Zhu Hongliang , Wang Baojun , Bian Jing , Zhao Lingjuan , Wang Wei. Butt-Joint Monolithically Integrated DFB-LD/EA-MD Light Source for 10Gbit/ s Transmission. Chinese Journal of Semiconductors. 2005, 26(6): 1100-1103.
    [68] M. Jutzi, M. Berroth, G. Wohl, M. Oehme, E. Kasper. Ge-on-Si Vertical Incidence Photodiodes With 39-GHz Bandwidth. IEEE Phot. Techn. Lett., 2005, 17(7): 1510-1512.
    [69] O. I. Dosunmu, D. D. Cannon, M. K. Emsley, L. C. Kimerling, and M. S. Unlu. High-Speed Resonant Cavity Enhanced Ge Photodetectors on Reflecting Si Substrates for 1550-nm Operation. IEEE Photonics Technology Letters , 2005,17(1):175-177.
    [70] Nishiyama, N., Caneau, C., Zah, C.E. InP-based vertical cavity surface emitting lasers for 10G applications. Proceedings of SPIE. 2005, 6020:1-9.
    [71] AL-Omari. A. N., Lear. K. L. Polyimide-planarized vertical-cavity surface-emitting lasers with 17.0-GHz bandwidth. IEEE Photonics Technology Letters, 2004, 16(4): 969-971.
    [72] M. K. Emsley, O. I. Dosunmu, P. Muller, M. S. Unlu. Silicon Resonant Cavity Enhanced Photodetector Arrays for Optical Interconnects. Proceedings of SPIE, 2003,5246: 409-421.
    [73]陈雄斌,唐君,周毅,裴为华,刘博,陈弘达.并行光收发模块与光互连.半导体学报. 2007,28(z1).
    [74] YS Liu, HS Cole, JPG Bristow, Y Liu. Polymer-based optical interconnect technology: a route to low-cost optoelectronic packaging and interconnect. Proc. SPIE, 1995, 2400: 80-88.
    [75] Liu Y. S., Wojnarowski R. J., Hennessy W. A. et. al. High density optical interconnects for board and backplaneapplications using VCSELs and polymer waveguides. Electronic Components and Technology Conference, 1997.
    [76] Lunitz B. Guttmann J. Huber H. P. Moisel J. Rode M. Experimental demonstration of 2.5 Gbit/s transmission with 1 mpolymer optical backplane. Electronics Letters. 2001, 37(17), pp. 1079.
    [77] Yu Jinzhong, Wang Qiming. Recent Advancements in Si-Based Photonic Materials and Devices. Chinese Journal of Semiconductors. 2007, 28(z1).
    [78] William James Dally and Brian Towles, Principles and practices of interconnection netwoks. SanFrancisco: Morgan-Kaufmann Press, 2004.
    [79]余金中.基光电子集成技术的进展.现代光学与光电子学的进展.王大珩主编.天津:天津科学出版社. 2006.
    [80] Nishiyama, N., Caneau, C., Tsuda, S. et. al. High optical reflection resistance of 1.3-um InP-based isolator-free VCSELs: 10-Gbps error-free transmission under reflection. Conference on Lasers and Electro-Optics, 2005.
    [81] Georgios I. Papadimitriou, Chrisoula Papazoglou, Andreas S. Pomportsis. Optical switching: switch fabrics, techniques, and architectures. Journal of Lightwave Technology, 2003, 21(2): 384-405.
    [82] G. P. Agrawal. Fiber-optic Communication Systems. Wiley and Sons, New York, NY, 2002
    [83] K. Fukuchi, T. Kasamatsu, M. Morie, R. Ohhira, T. Ito, K. Sekiya, D. Ogasahara, and T. Ono. 10.92-Tb/s (273×40-Gb/s) triple-band/ultra-dense WDM optical-repeatered transmission experiment. In Optical Fiber Communications Conf. (OFC), Mar. 2001.
    [84] R. Hemenway, R. Grzybowski, C. Minkenberg, R. Luijten. Optical-packet-switched interconnect for supercomputer applications. OSA J. Opt. Network. 2004, 3(12): 900-913.
    [85] Q. Yang and K. Bergman. Performances of the Data Vortex Switch Architecture Under Nonuniform and Bursty Traffic. J. Lightwave Technol. 2002, 20(8):1242-1247.
    [86]刘琨,井文才,刘铁根,张以谟,等.一种可扩展的双层光互连网络设计与分析.光电工程, 2007, 34(1): 135-138.
    [87]贾大功,王光辉,井文才,张尹馨,张红霞,张以谟,等.应用无线红外技术的光互连器件的设计.光通信技术, 2006.
    [88]贾大功,刘琨,井文才,张以谟,周革.具有旋转连接功能的双层光互连网络设计.光子学报, 2006, 35(11): 1738-1741.
    [89]刘琨,井文才,刘铁根,张以谟,等.有旋转连接的双层光互连网络设计与分析.光电子·激光. 2005,16(6): 694-697.
    [90]孙志祥,井文才,张以谟,周革,等.基于数字交叉开关的波分复用光互连网络设计.光电子·激光. 2005, 16(1): 53-56.
    [91]冯勇华,罗风光,袁菁,曹明翠.基于EOPCB的芯片网络.华中科技大学学报(自然科学版), 2007, 35(Sup.I), 5-7.
    [92]袁菁,罗风光,曹明翠,周新军. MPP计算机群机系统的光互连背板技术研究.华中科技大学学报(自然科学版), 2004, 32(11): 74-76.
    [93]黄平,罗风光,曹明翠. Mesh互连网络光互连板结构设计.华中科技大学学报(自然科学版), 2002, 30(6): 37-39.
    [94]吴献文,肖立权.基于芯片垂直集成技术的互连技术研究.计算机应用研究, 2004,21(5): 78-80.
    [95]吴献文.并行计算机高速互连网络中光互连技术的研究与设计.国防科学技术大学,硕士论文, 2003.
    [96]陈弘达,左超.甚短距离光传输技术.北京:科学出版社, 2004.
    [97]杨俊波,苏显渝,徐平.可重排无阻塞全混洗光网络光学实现方法.光电工程, 2007, 34(5): 103-108.
    [98]杨俊波,苏显渝,徐平.全混洗变换的光学实现方法.光学精密工程, 15(4): 2007, 505-511.
    [99]刘方爱,刘志勇,乔香珍.光RP(k)网络上Hypercube通信模式的波长指派算法.软件学报, 2003, 14(3), 575-581.
    [100]陈亚文,刘方爱,张海波.并行FFT的通信模式在一组规则WDM光互连网络上的波长分配.计算机研究与发展, 2005, 42(7): 1231-1234.
    [101] http://www.omnetpp.org/
    [102] Bjarne E. Helvik, Ragnar Andreassen. Fault Tolerance in Optical Networks; A study of electronic in- and egress interconnections in Torus topologies. In Proc. 17th Nordic Teletraffic Seminar, pp. 347-358, 2004.
    [103]王兵山,李舟军,张强.离散数学.国防科技大学出版社, 1998.
    [104] Kai Hwang, Zhiwei Xu. Scalable parallel computing technology, architecture, programming.陆鑫达等译.可扩展并行计算技术、结构与编程.机械工业出版社. 2000.
    [105] http://www.inphenix.com/
    [106] http://www.broadex-tech.com/
    [107] http://www.yilut.com/
    [108] http://www.xilinx.com
    [109] http://www.wtd.com.cn
    [110] Dhiraj K. Pradhan. Fault-Tolerant Computer System Design, pp. 126–144. Prentice Hall, 1996.

© 2004-2018 中国地质图书馆版权所有 京ICP备05064691号 京公网安备11010802017129号

地址:北京市海淀区学院路29号 邮编:100083

电话:办公室:(+86 10)66554848;文献借阅、咨询服务、科技查新:66554700