基于串行收发器的加速器电源数字控制器研究
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摘要
为满足强流重离子加速装置(HIAF)对电源控制器多版本兼容和高精度控制性能的要求,研发了1套基于串行收发器的加速器电源数字控制器(APSDC)。该控制器采用基于总线互联的模块化设计架构,在保证加速器电源数字控制器高精度控制性能的前提下,兼具多版本兼容能力。设计了1套基于串行收发器的高速同步数据总线(HSB)用于数字控制器子板间数据通信,总线带宽达2 Gbps,且板间数据同步误差低于1 ns。电源上线运行实验结果表明,APSDC各项设计指标符合HIAF对电源的高精度控制及其他关键性能的技术要求,并具备较强的系统扩展性。
To meet the requirement of multi-version compatibility and high-precision control of the power supply controller in High Intensity Heavy Ion Accelerator Facility(HIAF), an accelerator power supply digital controller(APSDC) based on transceiver was developed. The controller was based on the functional modular and system bus architecture. It has the compatibility, extensibility of multi-version and high-precision control performance of the accelerator power supply digital controller. A high-speed synchronous bus(HSB) based on transceiver was deployed inside the controller. Its bandwidth achieves 2 Gbps and its synchronization error is lower than 1 ns. The on-line running test result shows that all APSDC design indicators meet the technical requirement of HIAF for high-precision power supply control and other key performances, and it has strong system scalability.
To meet the requirement of multi-version compatibility and high-precision control of the power supply controller in High Intensity Heavy Ion Accelerator Facility(HIAF), an accelerator power supply digital controller(APSDC) based on transceiver was developed. The controller was based on the functional modular and system bus architecture. It has the compatibility, extensibility of multi-version and high-precision control performance of the accelerator power supply digital controller. A high-speed synchronous bus(HSB) based on transceiver was deployed inside the controller. Its bandwidth achieves 2 Gbps and its synchronization error is lower than 1 ns. The on-line running test result shows that all APSDC design indicators meet the technical requirement of HIAF for high-precision power supply control and other key performances, and it has strong system scalability.
引文
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[3] WANG R,CHEN Y,HUANG Y,et al.A new digital pulse power supply in heavy ion research facility in Lanzhou[J].Nuclear Instruments and Methods in Physics Research A,2013,727(9):46-50.
[4] HIAF project overview[EB/OL].[2018-02-03].http://hiaf.impcas.ac.cn/article/detail-63.html.
[5] 王红志.PCI-E总线在数控系统中的应用研究[D].北京:中国科学院大学,2017.
[6] 黄玉珍,陈又新,闫怀海,等.基于FPGA的数字电源调节器研究与设计[J].核电子学与探测技术,2010,30(10):1 334-1 336.HUANG Yuzhen,CHEN Youxin,YAN Huai-hai,et al.Research and design of digital power regulator based on FPGA[J].Nuclear Electronics & Detection Technology,2010,30(10):1 334-1 336(in Chinese).
[7] BAYER E,TRAXLER M.A high-resolution (RMS) 48-channel time-to-digital converter (TDC) implemented in a field programmable gate array (FPGA)[J].IEEE Transactions on Nuclear Science,2011,58(4):1 547-1 552.
[8] 阚晓博.基于PEX8311 PCIE总线的高速图像采集系统设计[J].电子设计工程,2011,19(4):144-146.KAN Xiaobo.Design of high speed image acquisition system based on PEX8311 PCIE bus[J].Electronic Design Engineering,2011,19(4):144-146(in Chinese).
[9] KOOP M J,HUANG W,GOPALAKRISHNAN K,et al.Performance analysis and evaluation of PCIe 2.0 and quad-data rate infiniBand[C]//High Performance Interconnects.Hoti:IEEE,2008.
[10] Altera Corporation.Cyclone IV GX transceiver starter board reference manual[EB/OL].[2018-05-20].https://www.altera.com.
[11] 张会,刘伯栋.基于眼图分析的数字通信干扰效果方法研究[J].舰船电子工程,2011,31(2):73-76.ZHANG Hui,LIU Bodong.Study on jamming effect of digital communication based on eye diagram analysis[J].Ship Electronics Engineering,2011,31(2):73-76(in Chinese).
[12] CHUNG J,KIM I W,PAN P,et al.Input buffer for multiple differential I/O standards:US,US 7425844 B1[P].2008-05-08.