Comments on “Extend orthogonal Latin square codes for 32-bit data protection in memory applications” Microelectron. Reliab. 63, 278-283 (2016)

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• 作者：Shanshan Liu^a ; ^{ssliu_hit@163.com} ; Pedro Reviriego^b ; ^{previrie@nebrija.es} ; Alfonso Sá ; nchez-Maciá ; n^b ; ^{asanchep@nebrija.es} ; Juan Antonio Maestro^b ; ^{jmaestro@nebrija.es} ; Liyi Xiao^a ; ^{xiaoly@hit.edu.cn}
• 关键词：Latin square code ; Multiple cell upsets ; Memory
• 刊名：Microelectronics Reliability
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：69
• 期：Complete
• 页码：126-129
• 全文大小：1012 K
• 卷排序：69

文摘

Additional extended orthogonal Latin square codes to protect 32-bit data words are presented. The new codes require less parity bits than the ones presented in the original paper at the cost of a moderate overhead in encoding and decoding complexity.