Effect of Halo structure variations on the threshold voltage of a 22 nm gate length NMOS transistor

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• 作者：A.H. Afifah Maheran ; P.S. Menon ; I. Ahmad ; S. Shaari
• 关键词：22  ; nm Gate length ; NMOS ; High-k/metal gate ; Silvaco ; Taguchi method
• 刊名：Materials Science in Semiconductor Processing
• 出版年：January, 2014
• 年：2014
• 卷：17
• 期：Complete
• 页码：155-161
• 全文大小：745 K

文摘

This paper reports on the effects of the Halo structure variations on threshold voltage (V_th) in a 22 nm gate length high-k/metal gate planar NMOS transistor. Since the V_th is one of the important physical parameter for determining the functionality of complementary metal-oxide-semiconductor device, this experiment will focus on finding the best combination on process parameter to achieve the best value of V_th. The Halo structure variable process parameters are the Halo implantation dose, the Halo implantation tilting angle, the Source/Drain implantation dose and the compensation implantation dose. The design of the planar device consists of a combination of high permittivity material (high-k) and a metal gate. Titanium dioxide was used as the high-k material instead of the traditional SiO₂ dielectric and tungsten silicide was used as the metal gate. The optimization process was executed using Taguchi's L₉ array to obtain a robust design. Taguchi's Nominal-the-Best signal-to-noise ratio was used in an effort to minimize the variance of V_th. The results show that the V_th values have least variance and the mean value can be adjusted to 0.289 V卤12.7% which is in line with projections made by the International Technology Roadmap for Semiconductors.