Divide-by-4 capacitive cross-coupled injection-locked frequency dividers

详细信息    查看全文

• 作者：Sheng-Lyang Jang ; Chih-Han Fang
• 关键词：Dual ; resonance resonator ; Divid ; by ; 4 injection ; locked frequency divider ; Locking range ; CMOS ; Capacitive cross ; coupled oscillator
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2016
• 出版时间：January 2016
• 年：2016
• 卷：86
• 期：1
• 页码：59-63
• 全文大小：1,106 KB
• 参考文献：1.K. Yamamoto and M. Fujishima, “70 GHz CMOS harmonic injectionlockeddivider,” in IEEE Int. Solid-State Circuits Conf. Dig.,pp. 2472–2481, Feb. 2006.
  2.Lee, S. H., Jang, S. L., & Chung, Y. H. (2007). A low voltage divide-by-4injection locked frequency divider with quadrature outputs. IEEE Microwave and Wireless Components Letters, 17(5), 373–375.CrossRef
  3.Jang, S.-L., & Liuand, C. C. (2009). C.-W. Chung”, A tail-injected divide-by-4 SiGe HBT injection locked frequency divider”. IEEE Microwave and Wireless Components Letters, 19(4), 236–238.CrossRef
  4.Jang, S.-L., Liu, C.-H., Chang, C.-W., & Juang, M.-H. (2011). A low-voltage, low power divide-by-4 LC-tank injection-locked frequency divider. International Journal of Electronics, 98(4), 521–527.CrossRef
  5.Jang, S.-L., Teng H.-F., Tzeng S.-S. and Hsue, C.-W. Degeneration of over-voltage stress CMOS divide-by-4 injection-locked frequency divider. ISNE2014.
  6.Wu, L., & Luong, H. C. (2013). Analysis and design of a 0.6 V 2.2 mW 58.5-to-72.9 GHz divide-by-4 injection-locked frequency divider with harmonic boosting. IEEE Transactions on Circuits and Systems-Part I, Regular Papers, 60(8), 2001–2008.CrossRef
  7.Chang, C.-W., Jang, S.-L., & Juang, M.-H. (2012). Divide-by-4 injection-locked frequency divider using two linear mixers. Microwave and Optical Technology Letters, 54(6), 1359–1362.CrossRef
  8.Chang, C.-W., & Jang, S.-L. (2012). A differential BiCMOS divide-by-4 injection-locked frequency divider. Microwave and Optical Technology Letters, 54(12), 2825–2828.CrossRef
  9.Chang, C.-W., & Jang, S.-L. (2014). LC-tank divide-by-4 injection-locked frequency divider using the second-order harmonic feedback. International Journal of Electronics, 101(2), 204–211.CrossRef
  10.Jang, S.-L., Chang, Y.-T., Hsue, C.-W., & Juang, M.-H. (2015). Wide-locking range divide-by-4 injection-locked frequency divider using injection MOSFET DC-biased above threshold region. International Journal of Circuit Theory and Applications. doi:10.​1002/​cta.​2116 .
  11.Jang, S.-L., & Fu, C.-C. (2014). Wide locking range divide-by-4 LC-tank injection-locked frequency divider using series-mixers. Analog Integrated Circuits and Signal Processing, 78(2), 523–528.CrossRef
  12.Jang, S.-L. (2015). J.-F. Huang and F.-B. Lin”, Wide-locking range LC-tank divide-by-4 injection-locked frequency divider using transformer feedback”, Int. J. RF Microwave. Computer-Aided Design, 25(7), 557–562.
  13.Jang, S.-L., & Lin, C.-Y. (2014). A wide-locking range Class-C injection-locked frequency divider. Electronics Letters, 50(23), 1710–1712.CrossRef
  14.Jang, S. L., Wu, Z. H., Hsue, C. W., & Teng, H. F. (2013). Wide-Locking Range Dual-Band Injection-Locked Frequency Divider. Microwave and Optical Technology Letters, 55(10), 2333–2337.CrossRef
  15.Jang, S. L., Huang, L. Y., Hsue, C. W., & Huang, J. F. (2015). Injection-Locked Frequency Divider Using Injection Mixer DC-Biased in Sub-threshold. IEEE Microwave and Wireless Components Letters, 25(3), 193–195.CrossRef
  
• 作者单位：Sheng-Lyang Jang (1)
  Chih-Han Fang (1)
  
  1. Department of Electronic Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan, R.O.C
  
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems
  Electronic and Computer Engineering
  Signal,Image and Speech Processing
  
• 出版者：Springer Netherlands
• ISSN：1573-1979

文摘

Wide locking range is an important parameter for injection-locked frequency divider (ILFD) to cope with the supply voltage variation. This paper proposes a wide locking range divide-by-4 ILFD implemented in the TSMC 0.18 μm 1P6 M CMOS process. The ILFD uses a capacitive cross-coupled voltage-controlled oscillator as the core. The dc gate bias of cross-coupled FETs is smaller than dc drain bias to optimize the power and locking range. Dual-resonance LC resonator is also used to enhance the locking range. At the drain-source bias of 1.2 V, and at the incident power of 0 dBm the measured locking range of divide-by-4 ILFD is 3.3 GHz, from the incident frequency 7.5–10.8 GHz, the percentage is 36.06%. The core power consumption is 11.83 mW. The die area is 0.883 × 0.851 mm2. Keywords Dual-resonance resonator Divid-by-4 injection-locked frequency divider Locking range CMOS Capacitive cross-coupled oscillator