Integration of Highly Strained SiGe in Source and Drain with HK and MG for 22 nm Bulk PMOS Transistors

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• 作者：Guilei Wang ; Jun Luo ; Changliang Qin ; Renrong Liang…
• 关键词：22 ; nm PMOS ; SiGe selective epitaxy ; RPCVD ; High ; k and metal gate
• 刊名：Nanoscale Research Letters
• 出版年：2017
• 出版时间：December 2017
• 年：2017
• 卷：12
• 期：1
• 全文大小：2429KB
• 刊物主题：Nanotechnology; Nanotechnology and Microengineering; Nanoscale Science and Technology; Nanochemistry; Molecular Medicine;
• 出版者：Springer US
• ISSN：1556-276X
• 卷排序：12

文摘

In this study, the integration of SiGe selective epitaxy on source/drain regions and high-k and metal gate for 22 nm node bulk pMOS transistors has been presented. Selective Si_1-xGe_x growth (0.35 ≤ × ≤ 0.40) with boron concentration of 1–3 × 1020 cm−3 was used to elevate the source/drain. The main focus was optimization of the growth parameters to improve the epitaxial quality where the high-resolution x-ray diffraction (HRXRD) and energy dispersive spectrometer (EDS) measurement data provided the key information about Ge profile in the transistor structure. The induced strain by SiGe layers was directly measured by x-ray on the array of transistors. In these measurements, the boron concentration was determined from the strain compensation of intrinsic and boron-doped SiGe layers. Finally, the characteristic of transistors were measured and discussed showing good device performance.