Processing-in-Memory: Exploring the Design Space

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• 作者：Marko Scrbak (17)
  Mahzabeen Islam (17)
  Krishna M. Kavi (17)
  Mike Ignatowski (18)
  Nuwan Jayasena (18)
  
  17. University of North Texas ; Denton ; USA
  18. AMD Research - Advanced Micro Devices ; Inc. ; Sunnyvale ; USA
  
• 关键词：Processing ; in ; memory ; 3D ; DRAM ; Big data ; MapReduce
• 刊名：Lecture Notes in Computer Science
• 出版年：2015
• 出版时间：2015
• 年：2015
• 卷：9017
• 期：1
• 页码：43-54
• 全文大小：256 KB
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  2. Zhang, D.P., Jayasena, N., Lyashevsky, A., et al.: A new perspective on processing-in-memory architecture design. In: Proceedings of the ACM SIGPLAN Workshop on Memory Systems Performance and Correctness, p. 7. ACM (2013)
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• 作者单位：Architecture of Computing Systems 篓C ARCS 2015
• 丛书名：978-3-319-16085-6
• 刊物类别：Computer Science
• 刊物主题：Artificial Intelligence and Robotics
  Computer Communication Networks
  Software Engineering
  Data Encryption
  Database Management
  Computation by Abstract Devices
  Algorithm Analysis and Problem Complexity
  
• 出版者：Springer Berlin / Heidelberg
• ISSN：1611-3349

文摘

With the emergence of 3D-DRAM, Processing-in-Memory has once more become of great interest to the research community and industry. In this paper, we present our observations on a subset of the PIM design space. We show how the architectural choices for PIM core frequency and cache sizes will affect the overall power consumption and energy efficiency. Our findings include detailed power consumption modeling for an ARM-like core as a PIM core. We show the maximum number of PIM cores we can place in the logic layer with respect to a power budget. In addition, we explore the optimal design choices for the number of cores as a function of frequency, utilization, and energy efficiency.