Two Extended Programmable BCH Soft Decoders Using Least Reliable Bits Reprocessing

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• 作者：Mohamed T. A. Osman (1)
  Hossam A. H. Fahmy (1)
  Yasmine A. H. Fahmy (1)
  Maha M. Elsabrouty (2)
  Ahmed Shalash (1)
  
• 关键词：BCH codes ; Soft decoding ; Maximum likelihood decoding ; Programmable architecture ; VLSI
• 刊名：Circuits, Systems, and Signal Processing
• 出版年：2014
• 出版时间：May 2014
• 年：2014
• 卷：33
• 期：5
• 页码：1369-1391
• 全文大小：
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• 作者单位：Mohamed T. A. Osman (1)
  Hossam A. H. Fahmy (1)
  Yasmine A. H. Fahmy (1)
  Maha M. Elsabrouty (2)
  Ahmed Shalash (1)
  
  1. Faculty of Engineering, Cairo University, Cairo, Egypt
  2. Egypt–Japan University of Science and Technology, Cairo, Egypt
  
• ISSN：1531-5878

文摘

This paper proposes two Bose–Chaudhuri–Hocquenghem (BCH) soft decoders suitable for high-rate codes with medium to large word length. The proposed decoders extend the correcting capability by providing a programmable performance gain according to the choice of the extra compensated bits p, with a theoretical maximum likelihood decoding when 2t+p approaches the codeword size n, where t is the correcting capability of the code under algebraic decoding. Our proposed architectures for the proposed algorithms use pipelined arithmetic units, leading to a reduction in the critical paths. This allows for an increase in the operating frequency by up to m/2 times compared to algebraic decoders, where m is the Galois field size. Our proposed decoders operate only on the least reliable bits, which leads to a reduction in the decoder complexity by removing the Chien search procedure.