摘要
Transistor channel lengths are being continually scaled to smaller dimensions to improve the high-frequency performance and package density, which will lead to the introduction of sub-50 nm gate lengths in production in the near future. In this paper, the performance of a double gate (DG) vertical metal oxide semiconductor field effect transistor (MOSFET) using strained-SiGe as the channel has been analyzed using simulation. The advantages of the band gap engineering and the vertical structure are shown in terms of (a) independence of channel length, (b) independence of source-drain bias, (c) improved device characteristics (lower off-current), (d) reduction of short channel effects, and (e) suitability for low-power operation.