摘要
本文针对矢量基二维DCT提出内存存取减少方法.该方法旨在减少计算中因权重因子和信号输入而导致的内存存取.它首先利用权重因子的属性将计算流程图内每相邻两阶段内的蝴蝶运算单元进行融合,然后再以较少的权重因子来计算.本文采用通用DSP处理器来验证该方法对矢量基二维DCT算法的有效性.并且实验结果显示该方法相比于常规方法可以大幅度减少运算所需的时钟周期、降低对运算中对内存的存取量、以及占用更少的内存.
This paper proposes a novel memory reference reduction method for vector-radix 2D DCT. This method aims to reduce the memory reference owing to weighting factors and signal input. The proposed method merges the butterflies at every neighboring two stages in the computation diagram,then compute them with fewer weighting factors. Hardware platform based on general purpose processor is used to verify the effectiveness of the proposed method for vector-radix 2-D FCT pruning implementation. Experimental results validate the benefits of the proposed method with less clock cycle,reduced memory reference fewer memory space compared with the conventional implementation.
引文
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