摘要
本论文的研究内容是国防“十五”预研项目“专用高性能微处理器”的一部分。
PowerPc603e微处理器系统由定点执行单元、浮点单元、指令(数据)Cache、总线接口单元、存储管理单元组成，以流水和超标量方式执行指令。本论文完成浮点单元的算法研究与实现、数据通路的设计与实现、控制通路的设计与实现、PowerPc603e系统的集成及FPU部分的验证，其中重点讨论FPU数据通路的设计与实现。
本课题组设计的PowerPc603e芯片，指令系统与Motorola公司的PowerPc603e兼容，而微体系结构采用自主设计的技术路线。采用Top—Down的高层次设计方法使用verilog语言在Sun工作站上运用VCS、Cover Meter进行功能(时序)仿真，运用Design Compiler进行综合布线，最终将后端交付第三方公司采用TSMC0.25微米工艺投片生产。
本论文的研究工作包括：
·对于PowerPc603eFPU中所采取算法的选择和验证：实现了除法／倒数、倒数平方根指令，优化了加法器面积。
·FPU中数据通路的设计与实现，重点是一个64bit乘加器的实现，包括尾数部分：部分积产生和选择单元、wallace压缩单元、161bit右移对阶移位器、161bit加法器、161bit前导零判断逻辑和161bit左移规格化单元；指数部分：指数产生单元、指数选择单元和指数调整单元。
·FPU中控制通路的设计与实现，重点是51条指令的译码，数据相关的处理，异常的处理以及舍入。
·FPU的功能仿真，采用了3种方式进行功能仿真。
·FPU综合中进行的编码优化，主要目的是提高设计的速度。
·FPU的时序仿真。
通过本论文的研究为设计具有自主知识产权的嵌入式微处理器积累了经验。
The work in this thesis is part of National 05' project entitled "Application Specified high performance microprocessor".
There are five parts in PowerPc603e?microprocessor: Integer Execution Unit, Floating Point Unit(FPU), Instruction(Data) Cache, Bus Interface Unit and Memory Manage Unit. The instructions are executed with pipeline way. This paper studies FPU's algorithm, data-path, control-path, and implements the integration of the PowerPc603e system. This thesis mainly discusses the design and implementation of the floating point unit in the embedded PowerPc603e microrpocessor.
The research work of this thesis mainly includes:
Select and verify some algorithm of PowerPc603e's FPU.
Design and implemention of the data-path of FPU, with emphasis in design a 64bit multiply-add unit. Which includes the design of mantissa and exponent. To the mantissa, there are six parts: part products generate and select unit, Wallace compress unit, 161bit right shifter, 161bit adder, 161bit leading zero detector and 161bit left shifter. To the exponent, there are three parts: exponent generate unit, exponent select unit, exponent adjust unit.
Function simulation in three ways.
Coding optimization for improving the speed of FPU.
Timing simulation for verifing the setup/hold time.
PowerPc603e is a complex microporcessor system. This thesis has contributed a lot to the designing of embedded microprocessor with full copyrights. The design of PowerPC603e system provided an optional method for urgent needed microprocess in aviation projects.
引文
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