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1.Modeling and simulation of circuits with shared structurally synthesized BDDs

作者：Raimund Ubar ^{raiub@pld.ttu.ee} ; Lembit Jü ; rimä ; gi ; ^{lembit.jyrimagi@gmail.com} ; Jaan Raik ^{jaan@pld.ttu.ee} ; Vladimir Viies ^{viis@ati.ttu.ee}

关键词：Combinational and sequential circuits ; Logic simulation ; BDDs ; Minimization of BDDs ; SSBDDs

刊名：Microprocessors and Microsystems

出版年：2017

2.Testability integrated evaluation method based on testability virtual test data

作者：Guanjun Liu ; ^{gjliu342@qq.com" class="auth_mail}Author Vitae ; Chenxu ZhaoAuthor Vitae ; Jing Qiu ; Yong Zhang

关键词：Data fusion ; Fault detection ; Integrated evaluation ; Testability verification ; Virtual test

刊名：Chinese Journal of Aeronautics

出版年：February, 2014

3.Testability analysis based on the identification of testable blocks with predefined properties

作者：Jaroslav Skarvada ; Zdenek Kotasek ; Tomas Herrman

关键词：Testable block ; Circuit partitioning ; Test vectors reordering ; Scan cells reordering ; Low power

刊名：Microprocessors and Microsystems

出版年：2008

4.Integrating testability with design space exploration

作者：Zwolinski ; M. ; Gaur ; M.S.

刊名：Microelectronics Reliability

出版年：2003

5.Design for Testability for Highly Reconfigurable Component-Based Systems

作者：Andrea Baldini ; Paolo Prinetto ; Giovanni Denaro ; Mauro Pezzè

刊名：Electronic Notes in Theoretical Computer Science

出版年：2003

6.Preface: Volume 82, Issue 6

作者：Mauro Pezzè

刊名：Electronic Notes in Theoretical Computer Science

出版年：2003

7.Testability and the Refutation and Corroboration of Cladistic Hypotheses

作者：Kluge ; Arnold G.

刊名：Cladistics

出版年：1997

8.Validation-directed specification of communications systems

作者：Probert ; Robert ; Saleh ; Kassem ; Hua-Long ; Yu

关键词：communications systems ; relative clock time ; relative concurrency ; validation-directed specifications

刊名：Information and Software Technology

出版年：1995

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