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Wiley电子期刊(1)	SpringerLink电子期刊(1022)	NATURE电子期刊(2)	Elsevier电子期刊(2923)
Springer电子图书(10)	ProQuest学位论文(212)	GSW全文库(1)	ACS电子期刊(2)

在“Elsevier电子期刊”中，命中：2,923条，耗时：0.019019 秒

在所有数据库中总计命中：4,173条

1.Two-level main memory co-design: Multi-threaded algorithmic primitives, analysis, and simulation

作者：Michael A. Bender^a ; ^{bender@cs.stonybrook.edu}Author Vitae ; Jonathan W. Berry^b ; ^{jberry@sandia.gov}Author Vitae ; Simon D. Hammond^b ; ^{sdhammo@sandia.gov}Author Vitae ; K. Scott Hemmert^b ; ^{kshemme@sandia.gov}Author Vitae ; Samuel McCauley^a ; ^{smccauley@cs.stonybrook.edu}Author Vitae ; Branden Moore^b ; ^{bjmoor@sandia.gov}Author Vitae ; Benjamin Moseley^c ; ^{moseleyb85@gmail.com}Author Vitae ; Cynthia A. Phillips^b ; ^{caphill@sandia.gov}Author Vitae ; David Resnick^b ; ^{drresni@sandia.gov}Author Vitae ; Arun Rodrigues^b ; ^{afrodni@sandia.gov}Author Vitae

关键词：Two-level memory ; High-bandwidth memory ; Sorting ; kk-means clustering

刊名：Journal of Parallel and Distributed Computing

出版年：2017

2.Fine grained, direct access file system support for storage class memory

作者：Yi Wang^a ; ^bAuthor Vitae ; Tianzheng Wang^cAuthor Vitae ; Duo Liu^dAuthor Vitae ; Zili Shao ; ^f ; ^{cszlshao@comp.polyu.edu.hk}Author Vitae ; Jingling Xue^eAuthor Vitae

关键词：Storage class memory ; Memory management ; Block device support ; Phase change memory ; Byte-addressable direct I/O

刊名：Journal of Systems Architecture

出版年：2017

3.An efficient and portable SIMD algorithm for charge/current deposition in Particle-In-Cell codes

作者：H. Vincenti^a ; ^b ; ^{hvincenti@lbl.gov} ; M. Lobet^a ; ^{mlobet@lbl.gov} ; R. Lehe^a ; ^{rlehe@lbl.gov} ; R. Sasanka^c ; ^{ruchira.sasanka@intel.com} ; J.-L. Vay^a ; ^{jlvay@lbl.gov}

关键词：Particle-In-Cell method ; OpenMP ; SIMD Vectorization ; AVX2 ; AVX512 ; Tiling ; Cache reuse ; Many-core architectures

刊名：Computer Physics Communications

出版年：2017

4.Parallel meshing of surfaces represented by collections of connected regions

作者：P. Laug ; ^a ; ^{patrick.laug@inria.fr} ; F. Guibault^b ; H. Borouchaki^c

关键词：Surface meshing ; Parametric faces ; Parallel processing ; CAD system ; Discrete support ; Dynamic load balancing

刊名：Advances in Engineering Software

出版年：2017

5.Study on the key technologies of a high-speed CMOS camera

作者：Baotan Jiang^a ; ^b ; ^c ; ^{jbt21@163.com" class="auth_mail" title="E-mail the corresponding author} ; ^{jbtcas@gmail.com" class="auth_mail" title="E-mail the corresponding author} ; Zhibin Pan^a ; Yuehong Qiu^b

关键词：CMOS camera ; LVDS ; FPGA ; Data alignment

刊名：Optik - International Journal for Light and Electron Optics

出版年：2017

6.Improved Architecture for Tag Matching in Cache Memory Coded with Error Correcting Codes

作者：Mary Francy Joseph^a ; Anith Mohan^b ;

关键词：Error correcting codes ; hamming distance ; cache memory ; soft errors

刊名：Procedia Technology

出版年：2016

7.An optically-enabled chip-multiprocessor architecture using a single-level shared optical cache memory

作者：P. Maniotis^a ; ^b ; ^{ppmaniot@csd.auth.gr" class="auth_mail" title="E-mail the corresponding author} ; S. Gitzenis^b ; L. Tassiulas^b ; ^c ; N. Pleros^a ; ^b

关键词：Optical cache memories ; Cache sharing in chip multiprocessors ; Optically connected shared cache memory ; Optical bus-based chip multiprocessor

刊名：Optical Switching and Networking

出版年：2016

8.Multi-objective optimization of energy consumption and execution time in a single level cache memory for embedded systems

作者：Josefa Dí ; az Á ; lvarez^a ; ^{mjdiaz@unex.es" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; José ; L. Risco-Martí ; n ; ^b ; ^{jlrisco@dacya.ucm.es" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; J. Manuel Colmenar^c ; ^{josemanuel.colmenar@urjc.es" class="auth_mail" title="E-mail the corresponding author}Author Vitae

关键词：Cache memory ; Energy ; Performance

刊名：Journal of Systems and Software

出版年：2016

9.A unified framework for designing high performance in-memory and hybrid memory file systems

作者：Xianzhang Chen^a ; ^{xzchen.cq@gmail.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Edwin H.-M. Sha ; ^a ; ^{edwinsha@gmail.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Qingfeng Zhuge^a ; ^{qfzhuge@gmail.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Weiwen Jiang^a ; ^{jiang.wwen@gmail.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Junxi Chen^a ; ^{cjxsimon@gmail.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Jun Chen^a ; ^{newdays.chenjun@gmail.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Jun Xu^b ; ^{xujun09@huawei.com" class="auth_mail" title="E-mail the corresponding author}Author Vitae

关键词：In-memory file systems ; Hybrid memory file systems ; Non-volatile memory ; Flash memory ; Performance

刊名：Journal of Systems Architecture

出版年：2016

10.Cross-matching caches: Dynamic timing calibration and bit-level timing-failure mask caches to reduce timing discrepancies with low voltage processors

作者：Po-Hao Wang^a ; ^{pohaow@cs.nctu.edu.tw" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Shang-Jen Tsai^aAuthor Vitae ; Rizal Tanjung^aAuthor Vitae ; Tay-Jyi Lin^cAuthor Vitae ; Jinn-Shyan Wang^bAuthor Vitae ; Tien-Fu Chen^aAuthor Vitae

关键词：Cache memory ; Low voltage ; Timing discrepancy ; Timing-failure tolerance

刊名：Integration, the VLSI Journal

出版年：2016

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