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在“Elsevier电子期刊”中，命中：2,836条，耗时：小于0.01 秒

在所有数据库中总计命中：1条

1.Reconfigurable very high throughput low latency VLSI (FPGA) design architecture of CRC 32

作者：Jubin Mitra ; ^{jm61288@gmail.com} ; ^{jmitra@cern.ch} ; Tapan Nayak ^{nayak@cern.ch}

关键词：Big data application ; High data rate ; Error detection ; Cyclic redundancy code (CRC) ; Re-configurable architecture ; FPGA ; CRC-32 ; VLSI design

刊名：Integration, the VLSI Journal

出版年：2017

2.Mixed-signal VLSI neural network based on Continuous Valued Number System

作者：Babak Zamanlooy ; ^{zamanlo@uwindsor.ca}Author Vitae ; Mitra Mirhassani ^{mitramir@uwindsor.ca}Author Vitae

关键词：Mixed signal neural networks ; VLSI implementation ; Continuous Valued Number System ; Analog digits

刊名：Neurocomputing

出版年：2017

3.Hardness of crosstalk minimization in two-layer channel routing

作者：Achira Pal (nee Biswas)^a ; ^{achira.pal@gmail.com} ; Atal Chaudhuri^a ; ^{atalc23@gmail.com} ; Rajat Kumar Pal^b ; ^{pal.rajatk@gmail.com} ; Alak Kumar Datta^c ; ^{alak.datta@visva-bharati.ac.in}

关键词：Approximation algorithm ; Channel routing problem ; Crosstalk minimization ; Doglegging ; High-performance routing ; NP-hardness

刊名：Integration, the VLSI Journal

出版年：2017

4.An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2^m)

作者：Bahram Rashidi^a ; ^{b.rashidi@ec.iut.ac.ir" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Sayed Masoud Sayedi^a ; ^{m_sayedi@cc.iut.ac.ir" class="auth_mail" title="E-mail the corresponding author}Author Vitae ; Reza Rezaeian Farashahi^b ; ^c ; ^{farashahi@cc.iut.ac.ir" class="auth_mail" title="E-mail the corresponding author}Author Vitae

关键词：Cryptography ; Logical effort ; Finite fields ; Optimal normal basis multiplication ; VLSI design

刊名：Integration, the VLSI Journal

出版年：2016

5.Silicon nanowires prepared by hydrogen-assisted rf-magnetron sputtering on bismuth-coated ITO glass

作者：Haifeng Wu ; Xiangdong Jiang ; ^{xdjiang@uestc.edu.cn} ; Wei Li ; ^{wli@uestc.edu.cn} ; Jimin Wang ; Yixiong Zeng ; Yangzhou Ming

关键词：Magnetron sputtering ; Silicon nanowires ; Bismuth catalyst ; Hydrogen radicals treatment ; VLS mechanism

刊名：Materials Letters

出版年：2017

6.Two-level rectilinear Steiner trees

作者：Stephan Held^a ; ^{held@or.uni-bonn.de}Author Vitae ; Nicolas Kä ; mmerling^b ; ^{kaemmerling@itl.tu-dortmund.de}Author Vitae

关键词：Steiner trees ; Approximation algorithms ; VLSI design

刊名：Computational Geometry

出版年：2017

7.Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits

作者：Hossam Sarhan ; ^{hossam.sarhan@gmail.com} ; Sebastien Thuries ; Olivier Billoint ; Fabien Clermidy

关键词：High-density 3D integrated circuits ; Monolithic 3D ; CoolCube ; 3DVLSI ; Cell-on-Buffer

刊名：Microelectronics Journal

出版年：2017

8.Voxel-based lesion symptom mapping analysis of depressive mood in patients with isolated cerebellar stroke: A pilot study

作者：Na Young Kim ; MD^a ; Sang Chul Lee ; MD ; PhD^a ; Ji-Cheol Shin ; MD ; PhD^a ; Ji Eun Park ; MD^b ; Yong Wook Kim ; MD ; PhD^a ; ^{ywkim1@yuhs.ac}

关键词：GDS ; Geriatric Depression Scale ; MBI ; modified Barthel index ; MMSE ; Mini-Mental State Examination ; MNI ; Montreal Neurological Institute ; MRI ; magnetic resonance imaging ; PSD ; post-stroke depression ; ROI ; regions of interest ; SD ; standard deviation ; VLSM ; voxel-based lesion-symptom mapping

刊名：NeuroImage: Clinical

出版年：2017

9.Hardware implementation of a novel water marking algorithm based on phase congruency and singular value decomposition technique

作者：Manas Ranjan Nayak ; Joyashree Bag ; Souvik Sarkar ; Subir Kumar Sarkar

关键词：Phase congruency ; Image watermarking ; Singular value decomposition ; Matlab ; VLSI ; FPGA

刊名：AEU - International Journal of Electronics and Communications

出版年：2017

10.VLSI supply chain security risks and mitigation techniques: A survey

作者：Bao Liu^a ; Author Vitae ; Gang Qu^bAuthor Vitae

关键词：Security ; VLSI ; IP theft ; Hardware Trojan

刊名：Integration, the VLSI Journal

出版年：2016

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