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1.
Investigation on the layout strategy of
ggNMOS
ESD protection devices for uniform conduction behavior and optimal width scaling
作者:
GuangYi Lu (1)
Yuan Wang (1) (2)
LiZhong Zhang (1)
Jian Cao (1)
Song Jia (1)
Xing Zhang (1) (2)
1. Institute of Microelectronics
;
Peking University
;
Beijing
;
100871
;
China
2. Innovation Center for Micro/Nanoelectronics and Integrated System
;
Beijing
;
China
关键词:
gate
;
grounded
NMOS (
ggNMOS
)
;
electro
;
static discharge (ESD)
;
triggering voltage
;
holding voltage
;
second breakdown current
;
鏍呮帴鍦板瀷NMOS
;
闈欑數鏀剧數
;
瑙﹀彂鐢靛帇
;
缁存寔鐢靛帇
;
浜屾鍑荤┛鐢垫祦
;
042402
刊名:SCIENCE CHINA Information Sciences
出版年:2015
1
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关键词(1)
文摘(1)
按出版年细分(1)
2015年(1)
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